Commit d6d1053a authored Mar 01, 2013 by Arnd Bergmann

clk: vt8500: Fix "fix device clock divisor calculations"



Patch 72480014 "Fix device clock divisor calculations" was apparently
rebased incorrectly before it got upstream, causing a build error.

Replacing the "prate" pointer with the local parent_rate is most
likely the correct solution.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tony Prisk <linux@prisktech.co.nz>
Cc: Mike Turquette <mturquette@linaro.org>

parent 7b59496c

drivers/clk/clk-vt8500.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -157,7 +157,7 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
		divisor = parent_rate / rate;

		/* If prate / rate would be decimal, incr the divisor */
		if (rate * divisor < *prate)
		if (rate * divisor < parent_rate)
		divisor++;

		if (divisor == cdev->div_mask + 1)

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