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Receive DMA maps are oversized, they include EISA legacy 128-byte alignment padding in size calculation whereas this padding is never used for data. Worse yet, if the skb's data area has been realigned indeed, then data beyond the end of the buffer will be synchronised from the receive DMA bounce buffer, possibly corrupting data structures residing in memory beyond the actual end of this data buffer. Therefore switch to using PI_RCV_DATA_K_SIZE_MAX rather than NEW_SKB_SIZE in DMA mapping, the value the former macro expands to is written to the receive ring DMA descriptor of the PDQ DMA chip and determines the maximum amount of data PDQ will ever transfer to the corresponding data buffer, including all headers and padding. Reported-by:Robert Coerver <Robert.Coerver@ll.mit.edu> Tested-by:
Robert Coerver <Robert.Coerver@ll.mit.edu> Signed-off-by:
Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
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