drm/amdgpu: replace mmhub_funcs with mmhub.funcs (d65bf1f8) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -925,7 +925,6 @@ struct amdgpu_device {
		uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];

		const struct amdgpu_df_funcs *df_funcs;
		const struct amdgpu_mmhub_funcs *mmhub_funcs;

		/* delayed work_func for deferring clockgating during resume */
		struct delayed_work delayed_init_work;

+2 −2

Original line number	Diff line number	Diff line
		@@ -687,8 +687,8 @@ int amdgpu_ras_error_query(struct amdgpu_device *adev,
		adev->gfx.funcs->query_ras_error_count(adev, &err_data);
		break;
		case AMDGPU_RAS_BLOCK__MMHUB:
		if (adev->mmhub_funcs->query_ras_error_count)
		adev->mmhub_funcs->query_ras_error_count(adev, &err_data);
		if (adev->mmhub.funcs->query_ras_error_count)
		adev->mmhub.funcs->query_ras_error_count(adev, &err_data);
		break;
		case AMDGPU_RAS_BLOCK__PCIE_BIF:
		if (adev->nbio.funcs->query_ras_error_count)

+3 −3

Original line number	Diff line number	Diff line
		@@ -655,7 +655,7 @@ static void gmc_v9_0_set_mmhub_funcs(struct amdgpu_device *adev)
		{
		switch (adev->asic_type) {
		case CHIP_VEGA20:
		adev->mmhub_funcs = &mmhub_v1_0_funcs;
		adev->mmhub.funcs = &mmhub_v1_0_funcs;
		break;
		default:
		break;
		@@ -750,8 +750,8 @@ static int gmc_v9_0_ecc_late_init(void *handle)
		return r;
		}

		if (adev->mmhub_funcs && adev->mmhub_funcs->ras_late_init) {
		r = adev->mmhub_funcs->ras_late_init(adev);
		if (adev->mmhub.funcs && adev->mmhub.funcs->ras_late_init) {
		r = adev->mmhub.funcs->ras_late_init(adev);
		if (r)
		return r;
		}