Commit d653d1ff authored May 25, 2020 by Paul Cercueil Committed by Thomas Bogendoerfer May 27, 2020

MIPS: ingenic: Add support for GCW Zero prototype



Add support for the GCW Zero prototype. The only (?) difference is that
it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail
device.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

parent 963287e4

arch/mips/boot/dts/ingenic/gcw0_proto.dts

0 → 100644

+13 −0

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0
		/dts-v1/;

		#include "gcw0.dts"

		/ {
		model = "GCW Zero Prototype";
		};

		&memory {
		/* Prototype has only 256 MiB of RAM */
		reg = <0x0 0x10000000>;
		};

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