Unverified Commit d605cbb6 authored Jun 04, 2020 by Oder Chiou Committed by Mark Brown Jun 04, 2020

ASoC: rl6231: Modify the target DMIC clock rate



Some DMIC components will not work correctly in the clock rate 3.072MHz.
We recommend the clock rate 1.536MHz in the gerenal case.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Link: https://lore.kernel.org/r/20200604071016.3981-1-oder_chiou@realtek.com


Signed-off-by: Mark Brown <broonie@kernel.org>

parent a6b675a8

sound/soc/codecs/rl6231.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -80,8 +80,8 @@ int rl6231_calc_dmic_clk(int rate)
		for (i = 0; i < ARRAY_SIZE(div); i++) {
		if ((div[i] % 3) == 0)
		continue;
		/* find divider that gives DMIC frequency below 3.072MHz */
		if (3072000 * div[i] >= rate)
		/* find divider that gives DMIC frequency below 1.536MHz */
		if (1536000 * div[i] >= rate)
		return i;
		}

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