ARM: dts: bcm2711: Enable PCIe controller

		#address-cells = <2>;

		#size-cells = <1>;

		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>;

		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>,

			 <0x6 0x00000000  0x6 0x00000000  0x40000000>;

		pcie0: pcie@7d500000 {

			compatible = "brcm,bcm2711-pcie";

			reg = <0x0 0x7d500000 0x9310>;

			device_type = "pci";

			#address-cells = <3>;

			#interrupt-cells = <1>;

			#size-cells = <2>;

			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "pcie", "msi";

			interrupt-map-mask = <0x0 0x0 0x0 0x7>;

			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143

							IRQ_TYPE_LEVEL_HIGH>;

			msi-controller;

			msi-parent = <&pcie0>;

			ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000

				  0x0 0x04000000>;

			/*

			 * The wrapper around the PCIe block has a bug

			 * preventing it from accessing beyond the first 3GB of

			 * memory.

			 */

			dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000

				      0x0 0xc0000000>;

			brcm,enable-ssc;

		};

		genet: ethernet@7d580000 {

			compatible = "brcm,bcm2711-genet-v5";