ppc476: Enable a linker work around for IBM errata #46

KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o

ifeq ($(CONFIG_476FPE_ERR46),y)

	KBUILD_LDFLAGS_MODULE += --ppc476-workaround \

		-T $(srctree)/arch/powerpc/platforms/44x/ppc476_modules.lds

endif

# No AltiVec or VSX instructions when building kernel

KBUILD_CFLAGS += $(call cc-option,-mno-altivec)

KBUILD_CFLAGS += $(call cc-option,-mno-vsx)

	select IBM_EMAC_EMAC4

	select IBM_EMAC_TAH

config 476FPE_ERR46

	depends on 476FPE

	bool "Enable linker work around for PPC476FPE errata #46"

	help

	  This option enables a work around for an icache bug on 476

	  that can cause execution of stale instructions when falling

	  through pages (IBM errata #46). It requires a recent version

	  of binutils which supports the --ppc476-workaround option.

	  The work around enables the appropriate linker options and

	  ensures that all module output sections are aligned to 4K

	  page boundaries. The work around is only required when

	  building modules.

# 44x errata/workaround config symbols, selected by the CPU models above

config IBM440EP_ERR42

	bool

SECTIONS

{

	.text : ALIGN(4096)

	{

		*(.text .text.* .fixup)

	}

	.init.text : ALIGN(4096)

	{

		*(.init.text .init.text.*)

	}

	.exit.text : ALIGN(4096)

	{

		*(.exit.text .exit.text.*)

	}

}