Merge tag 'v5.1-rc7' into x86/mm, to pick up fixes (d5963d87) · Commits · 戴 / test

Documentation/sysctl/vm.txt

+8 −8

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		@@ -866,14 +866,14 @@ The intent is that compaction has less work to do in the future and to
		increase the success rate of future high-order allocations such as SLUB
		allocations, THP and hugetlbfs pages.

		To make it sensible with respect to the watermark_scale_factor parameter,
		the unit is in fractions of 10,000. The default value of 15,000 means
		that up to 150% of the high watermark will be reclaimed in the event of
		a pageblock being mixed due to fragmentation. The level of reclaim is
		determined by the number of fragmentation events that occurred in the
		recent past. If this value is smaller than a pageblock then a pageblocks
		worth of pages will be reclaimed (e.g. 2MB on 64-bit x86). A boost factor
		of 0 will disable the feature.
		To make it sensible with respect to the watermark_scale_factor
		parameter, the unit is in fractions of 10,000. The default value of
		15,000 on !DISCONTIGMEM configurations means that up to 150% of the high
		watermark will be reclaimed in the event of a pageblock being mixed due
		to fragmentation. The level of reclaim is determined by the number of
		fragmentation events that occurred in the recent past. If this value is
		smaller than a pageblock then a pageblocks worth of pages will be reclaimed
		(e.g. 2MB on 64-bit x86). A boost factor of 0 will disable the feature.

		=============================================================

+1 −1

+1 −1

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		@@ -73,7 +73,7 @@ config ARM
		select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 \|\| CPU_V6K \|\| CPU_V7) && MMU
		select HAVE_EXIT_THREAD
		select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
		select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL
		select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG
		select HAVE_FUNCTION_TRACER if !XIP_KERNEL
		select HAVE_GCC_PLUGINS
		select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 \|\| CPU_V6K \|\| CPU_V7)

+3 −3

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		@@ -47,8 +47,8 @@ config DEBUG_WX

		choice
		prompt "Choose kernel unwinder"
		default UNWINDER_ARM if AEABI && !FUNCTION_GRAPH_TRACER
		default UNWINDER_FRAME_POINTER if !AEABI \|\| FUNCTION_GRAPH_TRACER
		default UNWINDER_ARM if AEABI
		default UNWINDER_FRAME_POINTER if !AEABI
		help
		This determines which method will be used for unwinding kernel stack
		traces for panics, oopses, bugs, warnings, perf, /proc/<pid>/stack,
		@@ -65,7 +65,7 @@ config UNWINDER_FRAME_POINTER

		config UNWINDER_ARM
		bool "ARM EABI stack unwinder"
		depends on AEABI
		depends on AEABI && !FUNCTION_GRAPH_TRACER
		select ARM_UNWIND
		help
		This option enables stack unwinding support in the kernel

+15 −1

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		@@ -1438,7 +1438,21 @@ ENTRY(efi_stub_entry)

		@ Preserve return value of efi_entry() in r4
		mov r4, r0
		bl cache_clean_flush

		@ our cache maintenance code relies on CP15 barrier instructions
		@ but since we arrived here with the MMU and caches configured
		@ by UEFI, we must check that the CP15BEN bit is set in SCTLR.
		@ Note that this bit is RAO/WI on v6 and earlier, so the ISB in
		@ the enable path will be executed on v7+ only.
		mrc p15, 0, r1, c1, c0, 0 @ read SCTLR
		tst r1, #(1 << 5) @ CP15BEN bit set?
		bne 0f
		orr r1, r1, #(1 << 5) @ CP15 barrier instructions
		mcr p15, 0, r1, c1, c0, 0 @ write SCTLR
		ARM( .inst 0xf57ff06f @ v7+ isb )
		THUMB( isb )

		0: bl cache_clean_flush
		bl cache_off

		@ Set parameters for booting zImage according to boot protocol