Commit d57f0b8c authored Nov 30, 2017 by Bjorn Helgaas

PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root as well as Downstream Ports

PCIe Downstream Ports normally have only a Device 0 below them.  To
optimize enumeration, we don't scan for other devices *unless* the
PCI_SCAN_ALL_PCIE_DEVS flag is set by set by quirks or the
"pci=pcie_scan_all" kernel parameter.

Previously PCI_SCAN_ALL_PCIE_DEVS only affected scanning below Switch
Downstream Ports, not Root Ports.

But the "Nemo" system, also known as the AmigaOne X1000, has a PA Semi Root
Port whose link leads to an AMD/ATI SB600 South Bridge.  The Root Port is a
PCIe device, of course, but the SB600 contains only conventional PCI
devices with no visible PCIe port.

Simplify and restructure only_one_child() so that we scan for all possible
devices below Root Ports as well as Switch Downstream Ports when
PCI_SCAN_ALL_PCIE_DEVS is set.

This is enough to make Nemo work with "pci=pcie_scan_all".  We would also
like to add a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically on Nemo so
users wouldn't have to use the "pci=pcie_scan_all" parameter, but we don't
have that yet.

Link: https://lkml.kernel.org/r/CAErSpo55Q8Q=5p6_+uu7ahnw+53ibVDNRXxrzRV9QnUr_9EUfw@mail.gmail.com
Link: https://bugzilla.kernel.org/show_bug.cgi?id=198057


Reported-and-Tested-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

parent 1291a0d5

drivers/pci/probe.c

+15 −10

Original line number	Diff line number	Diff line
		@@ -2215,22 +2215,27 @@ static unsigned next_fn(struct pci_bus bus, struct pci_dev dev, unsigned fn)

		static int only_one_child(struct pci_bus *bus)
		{
		struct pci_dev *parent = bus->self;
		struct pci_dev *bridge = bus->self;

		if (!parent \|\| !pci_is_pcie(parent))
		/*
		* Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so
		* we scan for all possible devices, not just Device 0.
		*/
		if (pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
		return 0;
		if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
		return 1;

		/*
		* PCIe downstream ports are bridges that normally lead to only a
		* device 0, but if PCI_SCAN_ALL_PCIE_DEVS is set, scan all
		* possible devices, not just device 0. See PCIe spec r3.0,
		* sec 7.3.1.
		* A PCIe Downstream Port normally leads to a Link with only Device
		* 0 on it (PCIe spec r3.1, sec 7.3.1). As an optimization, scan
		* only for Device 0 in that situation.
		*
		* Checking has_secondary_link is a hack to identify Downstream
		* Ports because sometimes Switches are configured such that the
		* PCIe Port Type labels are backwards.
		*/
		if (parent->has_secondary_link &&
		!pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
		if (bridge && pci_is_pcie(bridge) && bridge->has_secondary_link)
		return 1;

		return 0;
		}

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