Commit d56b1980 authored by Jay Cornwall's avatar Jay Cornwall Committed by Alex Deucher
Browse files

drm/amdkfd: Use same SQ prefetch setting as amdgpu 



0 causes instruction fetch stall at cache line boundary under some
conditions on Navi10. A non-zero prefetch is the preferred default
in any case.

Fixes soft hang in Luxmark.

Signed-off-by: default avatarJay Cornwall <jay.cornwall@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent a6c42e84

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v10.c

+3 −2
Original line number Diff line number Diff line
@@ -58,8 +58,9 @@ static int update_qpd_v10(struct device_queue_manager *dqm, 
	/* check if sh_mem_config register already configured */

	if (qpd->sh_mem_config == 0) {

		qpd->sh_mem_config =

				SH_MEM_ALIGNMENT_MODE_UNALIGNED <<

					SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;

			(SH_MEM_ALIGNMENT_MODE_UNALIGNED <<

				SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |

			(3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT);

#if 0

		/* TODO:

		 *    This shouldn't be an issue with Navi10.  Verify.

CRA Git | Maintained and supported by SUSTech CRA and CCSE