Commit d542b7c4 authored by Junzhi Zhao's avatar Junzhi Zhao Committed by CK Hu
Browse files

drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable 



The mtk_hdmi_send_infoframe have to
be run after PLL and PIXEL clock of HDMI enable.
Make sure that HDMI inforframes can be sent
successfully.

Signed-off-by: default avatarJunzhi Zhao <junzhi.zhao@mediatek.com>
Signed-off-by: default avatarBibby Hsieh <bibby.hsieh@mediatek.com>
parent 56e4b1e1

drivers/gpu/drm/mediatek/mtk_hdmi.c

+11 −6
Original line number Diff line number Diff line
@@ -1133,12 +1133,6 @@ static int mtk_hdmi_output_set_display_mode(struct mtk_hdmi *hdmi, 
	phy_power_on(hdmi->phy);

	mtk_hdmi_aud_output_config(hdmi, mode);



	mtk_hdmi_setup_audio_infoframe(hdmi);

	mtk_hdmi_setup_avi_infoframe(hdmi, mode);

	mtk_hdmi_setup_spd_infoframe(hdmi, "mediatek", "On-chip HDMI");

	if (mode->flags & DRM_MODE_FLAG_3D_MASK)

		mtk_hdmi_setup_vendor_specific_infoframe(hdmi, mode);



	mtk_hdmi_hw_vid_black(hdmi, false);

	mtk_hdmi_hw_aud_unmute(hdmi);

	mtk_hdmi_hw_send_av_unmute(hdmi);
@@ -1401,6 +1395,16 @@ static void mtk_hdmi_bridge_pre_enable(struct drm_bridge *bridge) 
	hdmi->powered = true;

}



static void mtk_hdmi_send_infoframe(struct mtk_hdmi *hdmi,

				    struct drm_display_mode *mode)

{

	mtk_hdmi_setup_audio_infoframe(hdmi);

	mtk_hdmi_setup_avi_infoframe(hdmi, mode);

	mtk_hdmi_setup_spd_infoframe(hdmi, "mediatek", "On-chip HDMI");

	if (mode->flags & DRM_MODE_FLAG_3D_MASK)

		mtk_hdmi_setup_vendor_specific_infoframe(hdmi, mode);

}



static void mtk_hdmi_bridge_enable(struct drm_bridge *bridge)

{

	struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
@@ -1409,6 +1413,7 @@ static void mtk_hdmi_bridge_enable(struct drm_bridge *bridge) 
	clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);

	clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);

	phy_power_on(hdmi->phy);

	mtk_hdmi_send_infoframe(hdmi, &hdmi->mode);



	hdmi->enabled = true;

}

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