Commit d52d6de2 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: set sdma irq src num according to sdma instances



Otherwise, it will cause driver access non-existing sdma registers
in gpu reset code path

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLe Ma <Le.Ma@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b629167d
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+15 −2
Original line number Original line Diff line number Diff line
@@ -2416,10 +2416,23 @@ static const struct amdgpu_irq_src_funcs sdma_v4_0_ecc_irq_funcs = {


static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev)
static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev)
{
{
	switch (adev->sdma.num_instances) {
	case 1:
		adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
		adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
		break;
	case 8:
		adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
		adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
		adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
		break;
	case 2:
	default:
		adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
		adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
		break;
	}
	adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs;
	adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs;
	adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs;
	adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs;
	adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
	adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs;
	adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs;
}
}