Commit d5152823 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/tv: Fix tv mode clocks



The oversample clock is always supposed to be either 108 MHz
or 148.5 MHz. Make it so.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181112170000.27531-5-ville.syrjala@linux.intel.com


Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
parent 6801603d
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+7 −7
Original line number Diff line number Diff line
@@ -635,7 +635,7 @@ static const struct tv_mode tv_modes[] = {
	},
	{
		.name       = "480p",
		.clock		= 107520,
		.clock		= 108000,
		.refresh	= 59940,
		.oversample     = TV_OVERSAMPLE_4X,
		.component_only = 1,
@@ -659,7 +659,7 @@ static const struct tv_mode tv_modes[] = {
	},
	{
		.name       = "576p",
		.clock		= 107520,
		.clock		= 108000,
		.refresh	= 50000,
		.oversample     = TV_OVERSAMPLE_4X,
		.component_only = 1,
@@ -683,7 +683,7 @@ static const struct tv_mode tv_modes[] = {
	},
	{
		.name       = "720p@60Hz",
		.clock		= 148800,
		.clock		= 148500,
		.refresh	= 60000,
		.oversample     = TV_OVERSAMPLE_2X,
		.component_only = 1,
@@ -707,7 +707,7 @@ static const struct tv_mode tv_modes[] = {
	},
	{
		.name       = "720p@50Hz",
		.clock		= 148800,
		.clock		= 148500,
		.refresh	= 50000,
		.oversample     = TV_OVERSAMPLE_2X,
		.component_only = 1,
@@ -732,7 +732,7 @@ static const struct tv_mode tv_modes[] = {
	},
	{
		.name       = "1080i@50Hz",
		.clock		= 148800,
		.clock		= 148500,
		.refresh	= 50000,
		.oversample     = TV_OVERSAMPLE_2X,
		.component_only = 1,
@@ -758,7 +758,7 @@ static const struct tv_mode tv_modes[] = {
	},
	{
		.name       = "1080i@60Hz",
		.clock		= 148800,
		.clock		= 148500,
		.refresh	= 60000,
		.oversample     = TV_OVERSAMPLE_2X,
		.component_only = 1,
@@ -1113,7 +1113,7 @@ static void intel_tv_pre_enable(struct intel_encoder *encoder,
static const struct drm_display_mode reported_modes[] = {
	{
		.name = "NTSC 480i",
		.clock = 107520,
		.clock = 108000,
		.hdisplay = 1280,
		.hsync_start = 1368,
		.hsync_end = 1496,