Commit d4cea38e authored Jul 12, 2017 by Archit Taneja Committed by Rob Clark Aug 01, 2017

drm/msm/dsi: Calculate link clock rates with updated dsi->lanes



After the commit mentioned below, we start computing the byte and pixel
clocks (dsi_calc_clk_rate) in the DSI bridge's mode_set() op. The
calculation involves the number of DSI lanes being used by the
downstream bridge/panel.

If the downstream bridge/panel tries to change the number of DSI lanes
(as done in the ADV7533 driver) in its mode_set() op, then our DSI
host driver will not have the correct number of lanes when computing
byte/pixel clocks.

Fix this by delaying the clock rate calculation in the DSI bridge
enable path. In particular, compute the clock rates in
msm_dsi_host_get_phy_clk_req().

This fixes the DSI host error interrupts seen when we try to switch
between modes that require different number of lanes (4 to 3 lanes, or
vice versa) on db410c. The error interrupts occur since the byte/pixel
clock rates aren't according to what the DSI video mode timing engine
expects.

Fixes: b62aa70a ("drm/msm/dsi: Move PHY operations out of host")
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

parent af1f5f12

drivers/gpu/drm/msm/dsi/dsi_host.c

+7 −7

Original line number	Diff line number	Diff line
		@@ -2137,6 +2137,13 @@ void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host,
		struct msm_dsi_phy_clk_request *clk_req)
		{
		struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
		int ret;

		ret = dsi_calc_clk_rate(msm_host);
		if (ret) {
		pr_err("%s: unable to calc clk rate, %d\n", __func__, ret);
		return;
		}

		clk_req->bitclk_rate = msm_host->byte_clk_rate * 8;
		clk_req->escclk_rate = msm_host->esc_clk_rate;
		@@ -2280,7 +2287,6 @@ int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
		struct drm_display_mode *mode)
		{
		struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
		int ret;

		if (msm_host->mode) {
		drm_mode_destroy(msm_host->dev, msm_host->mode);
		@@ -2293,12 +2299,6 @@ int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
		return -ENOMEM;
		}

		ret = dsi_calc_clk_rate(msm_host);
		if (ret) {
		pr_err("%s: unable to calc clk rate, %d\n", __func__, ret);
		return ret;
		}

		return 0;
		}

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