drm/i915/icl: Ringbuffer interrupt handling (d4ccceb0) · Commits · 戴 / test

On Gen11 interrupt masks need to be clear to allow C6 entry. We keep them all enabled knowing that we generate extra interrupts. v2: Rebase. v3: Remove gen 11 extra check in logical_render_ring_init. v4: Rebase fixes. v5: Rebase/refactor. v6: Rebase. v7: Rebase. v8: Update comment and commit message (Daniele) Signed-off-by:

Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by:

Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by:

Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by:

Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-1-mika.kuoppala@linux.intel.com

drivers/gpu/drm/i915/intel_breadcrumbs.c

+10 −6

Original line number	Diff line number	Diff line
		@@ -168,18 +168,22 @@ static void irq_enable(struct intel_engine_cs *engine)
		set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);

		/* Caller disables interrupts */
		if (engine->irq_enable) {
		spin_lock(&engine->i915->irq_lock);
		engine->irq_enable(engine);
		spin_unlock(&engine->i915->irq_lock);
		}
		}

		static void irq_disable(struct intel_engine_cs *engine)
		{
		/* Caller disables interrupts */
		if (engine->irq_disable) {
		spin_lock(&engine->i915->irq_lock);
		engine->irq_disable(engine);
		spin_unlock(&engine->i915->irq_lock);
		}
		}

		void __intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
		{

drivers/gpu/drm/i915/intel_lrc.c

+11 −2

Original line number	Diff line number	Diff line
		@@ -2037,8 +2037,17 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine)

		engine->set_default_submission = execlists_set_default_submission;

		if (INTEL_GEN(engine->i915) < 11) {
		engine->irq_enable = gen8_logical_ring_enable_irq;
		engine->irq_disable = gen8_logical_ring_disable_irq;
		} else {
		/*
		* TODO: On Gen11 interrupt masks need to be clear
		* to allow C6 entry. Keep interrupts enabled at
		* and take the hit of generating extra interrupts
		* until a more refined solution exists.
		*/
		}
		engine->emit_bb_start = gen8_emit_bb_start;
		}

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