Commit d4970ee0 authored by David Wu's avatar David Wu Committed by Linus Walleij
Browse files

pinctrl: rockchip: Add iomux-route switching support for rk3228 



There are 9 IP blocks pin routes need to be switched, that are
pwm-0, pwm-1, pwm-2, pwm-3, sdio, spi, emmc, uart2, uart1.

Signed-off-by: default avatarDavid Wu <david.wu@rock-chips.com>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent bd35b9bf

drivers/pinctrl/pinctrl-rockchip.c

+132 −0
Original line number Diff line number Diff line
@@ -605,6 +605,136 @@ static void rk3328_recalc_mux(u8 bank_num, int pin, int *reg, 
	*bit = data->bit;

}



static struct rockchip_mux_route_data rk3228_mux_route_data[] = {

	{

		/* pwm0-0 */

		.bank_num = 0,

		.pin = 26,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16),

	}, {

		/* pwm0-1 */

		.bank_num = 3,

		.pin = 21,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16) | BIT(0),

	}, {

		/* pwm1-0 */

		.bank_num = 0,

		.pin = 27,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16 + 1),

	}, {

		/* pwm1-1 */

		.bank_num = 0,

		.pin = 30,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 1) | BIT(1),

	}, {

		/* pwm2-0 */

		.bank_num = 0,

		.pin = 28,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16 + 2),

	}, {

		/* pwm2-1 */

		.bank_num = 1,

		.pin = 12,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 2) | BIT(2),

	}, {

		/* pwm3-0 */

		.bank_num = 3,

		.pin = 26,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16 + 3),

	}, {

		/* pwm3-1 */

		.bank_num = 1,

		.pin = 11,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 3) | BIT(3),

	}, {

		/* sdio-0_d0 */

		.bank_num = 1,

		.pin = 1,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16 + 4),

	}, {

		/* sdio-1_d0 */

		.bank_num = 3,

		.pin = 2,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16 + 4) | BIT(4),

	}, {

		/* spi-0_rx */

		.bank_num = 0,

		.pin = 13,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 5),

	}, {

		/* spi-1_rx */

		.bank_num = 2,

		.pin = 0,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 5) | BIT(5),

	}, {

		/* emmc-0_cmd */

		.bank_num = 1,

		.pin = 22,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 7),

	}, {

		/* emmc-1_cmd */

		.bank_num = 2,

		.pin = 4,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 7) | BIT(7),

	}, {

		/* uart2-0_rx */

		.bank_num = 1,

		.pin = 19,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 8),

	}, {

		/* uart2-1_rx */

		.bank_num = 1,

		.pin = 10,

		.func = 2,

		.route_offset = 0x50,

		.route_val = BIT(16 + 8) | BIT(8),

	}, {

		/* uart1-0_rx */

		.bank_num = 1,

		.pin = 10,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16 + 11),

	}, {

		/* uart1-1_rx */

		.bank_num = 3,

		.pin = 13,

		.func = 1,

		.route_offset = 0x50,

		.route_val = BIT(16 + 11) | BIT(11),

	},

};



static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,

				   int mux, u32 *reg, u32 *value)

{
@@ -2898,6 +3028,8 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = { 
		.label			= "RK3228-GPIO",

		.type			= RK3288,

		.grf_mux_offset		= 0x0,

		.iomux_routes		= rk3228_mux_route_data,

		.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),

		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,

		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,

};

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