Commit d4429f60 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (71 commits)
  powerpc/44x: Update ppc44x_defconfig
  powerpc/watchdog: Make default timeout for Book-E watchdog a Kconfig option
  fsl_rio: Add comments for sRIO registers.
  powerpc/fsl-booke: Add e55xx (64-bit) smp defconfig
  powerpc/fsl-booke: Add p5020 DS board support
  powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chips
  powerpc/fsl-booke: Add support for FSL Arch v1.0 MMU in setup_page_sizes
  powerpc/fsl-booke: Add support for FSL 64-bit e5500 core
  powerpc/85xx: add cache-sram support
  powerpc/85xx: add ngPIXIS FPGA device tree node to the P1022DS board
  powerpc: Fix compile error with paca code on ppc64e
  powerpc/fsl-booke: Add p3041 DS board support
  oprofile/fsl emb: Don't set MSR[PMM] until after clearing the interrupt.
  powerpc/fsl-booke: Add PCI device ids for P2040/P3041/P5010/P5020 QoirQ chips
  powerpc/mpc8xxx_gpio: Add support for 'qoriq-gpio' controllers
  powerpc/fsl_booke: Add support to boot from core other than 0
  powerpc/p1022: Add probing for individual DMA channels
  powerpc/fsl_soc: Search all global-utilities nodes for rstccr
  powerpc: Fix invalid page flags in create TLB CAM path for PTE_64BIT
  powerpc/mpc83xx: Support for MPC8308 P1M board
  ...

Fix up conflict with the generic irq_work changes in arch/powerpc/kernel/time.c
parents e10117d3 6a1c9dfe

arch/powerpc/boot/addnote.c

+2 −2
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 
#include <string.h>



/* CHRP note section */

char arch[] = "PowerPC";

static const char arch[] = "PowerPC";



#define N_DESCR	6

unsigned int descr[N_DESCR] = {
@@ -33,7 +33,7 @@ unsigned int descr[N_DESCR] = { 
};



/* RPA note section */

char rpaname[] = "IBM,RPA-Client-Config";

static const char rpaname[] = "IBM,RPA-Client-Config";



/*

 * Note: setting ignore_my_client_config *should* mean that OF ignores

arch/powerpc/boot/dts/bluestone.dts

0 → 100644
+254 −0
Original line number Diff line number Diff line 
/*

 * Device Tree for Bluestone (APM821xx) board.

 *

 * Copyright (c) 2010, Applied Micro Circuits Corporation

 * Author: Tirumala R Marri <tmarri@apm.com>

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation; either version 2 of

 * the License, or (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,

 * MA 02111-1307 USA

 *

 */



/dts-v1/;



/ {

	#address-cells = <2>;

	#size-cells = <1>;

	model = "apm,bluestone";

	compatible = "apm,bluestone";

	dcr-parent = <&{/cpus/cpu@0}>;



	aliases {

		ethernet0 = &EMAC0;

		serial0 = &UART0;

		serial1 = &UART1;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			device_type = "cpu";

			model = "PowerPC,apm821xx";

			reg = <0x00000000>;

			clock-frequency = <0>; /* Filled in by U-Boot */

			timebase-frequency = <0>; /* Filled in by U-Boot */

			i-cache-line-size = <32>;

			d-cache-line-size = <32>;

			i-cache-size = <32768>;

			d-cache-size = <32768>;

			dcr-controller;

			dcr-access-method = "native";

			next-level-cache = <&L2C0>;

		};

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */

	};



	UIC0: interrupt-controller0 {

		compatible = "ibm,uic";

		interrupt-controller;

		cell-index = <0>;

		dcr-reg = <0x0c0 0x009>;

		#address-cells = <0>;

		#size-cells = <0>;

		#interrupt-cells = <2>;

	};



	UIC1: interrupt-controller1 {

		compatible = "ibm,uic";

		interrupt-controller;

		cell-index = <1>;

		dcr-reg = <0x0d0 0x009>;

		#address-cells = <0>;

		#size-cells = <0>;

		#interrupt-cells = <2>;

		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */

		interrupt-parent = <&UIC0>;

	};



	UIC2: interrupt-controller2 {

		compatible = "ibm,uic";

		interrupt-controller;

		cell-index = <2>;

		dcr-reg = <0x0e0 0x009>;

		#address-cells = <0>;

		#size-cells = <0>;

		#interrupt-cells = <2>;

		interrupts = <0xa 0x4 0xb 0x4>; /* cascade */

		interrupt-parent = <&UIC0>;

	};



	UIC3: interrupt-controller3 {

		compatible = "ibm,uic";

		interrupt-controller;

		cell-index = <3>;

		dcr-reg = <0x0f0 0x009>;

		#address-cells = <0>;

		#size-cells = <0>;

		#interrupt-cells = <2>;

		interrupts = <0x10 0x4 0x11 0x4>; /* cascade */

		interrupt-parent = <&UIC0>;

	};



	SDR0: sdr {

		compatible = "ibm,sdr-apm821xx";

		dcr-reg = <0x00e 0x002>;

	};



	CPR0: cpr {

		compatible = "ibm,cpr-apm821xx";

		dcr-reg = <0x00c 0x002>;

	};



	plb {

		compatible = "ibm,plb4";

		#address-cells = <2>;

		#size-cells = <1>;

		ranges;

		clock-frequency = <0>; /* Filled in by U-Boot */



		SDRAM0: sdram {

			compatible = "ibm,sdram-apm821xx";

			dcr-reg = <0x010 0x002>;

		};



		MAL0: mcmal {

			compatible = "ibm,mcmal2";

			descriptor-memory = "ocm";

			dcr-reg = <0x180 0x062>;

			num-tx-chans = <1>;

			num-rx-chans = <1>;

			#address-cells = <0>;

			#size-cells = <0>;

			interrupt-parent = <&UIC2>;

			interrupts = <	/*TXEOB*/ 0x6 0x4

					/*RXEOB*/ 0x7 0x4

					/*SERR*/  0x3 0x4

					/*TXDE*/  0x4 0x4

					/*RXDE*/  0x5 0x4

		};



		POB0: opb {

			compatible = "ibm,opb";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;

			clock-frequency = <0>; /* Filled in by U-Boot */



			EBC0: ebc {

				compatible = "ibm,ebc";

				dcr-reg = <0x012 0x002>;

				#address-cells = <2>;

				#size-cells = <1>;

				clock-frequency = <0>; /* Filled in by U-Boot */

				/* ranges property is supplied by U-Boot */

				ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>;

				interrupts = <0x6 0x4>;

				interrupt-parent = <&UIC1>;



				nor_flash@0,0 {

					compatible = "amd,s29gl512n", "cfi-flash";

					bank-width = <2>;

					reg = <0x00000000 0x00000000 0x00400000>;

					#address-cells = <1>;

					#size-cells = <1>;

					partition@0 {

						label = "kernel";

						reg = <0x00000000 0x00180000>;

					};

					partition@180000 {

						label = "env";

						reg = <0x00180000 0x00020000>;

					};

					partition@1a0000 {

						label = "u-boot";

						reg = <0x001a0000 0x00060000>;

					};

				};

			}



			UART0: serial@ef600300 {

				device_type = "serial";

				compatible = "ns16550";

				reg = <0xef600300 0x00000008>;

				virtual-reg = <0xef600300>;

				clock-frequency = <0>; /* Filled in by U-Boot */

				current-speed = <0>; /* Filled in by U-Boot */

				interrupt-parent = <&UIC1>;

				interrupts = <0x1 0x4>;

			};



			IIC0: i2c@ef600700 {

				compatible = "ibm,iic";

				reg = <0xef600700 0x00000014>;

				interrupt-parent = <&UIC0>;

				interrupts = <0x2 0x4>;

			};



			IIC1: i2c@ef600800 {

				compatible = "ibm,iic";

				reg = <0xef600800 0x00000014>;

				interrupt-parent = <&UIC0>;

				interrupts = <0x3 0x4>;

			};



			RGMII0: emac-rgmii@ef601500 {

				compatible = "ibm,rgmii";

				reg = <0xef601500 0x00000008>;

				has-mdio;

			};



			TAH0: emac-tah@ef601350 {

				compatible = "ibm,tah";

				reg = <0xef601350 0x00000030>;

			};



			EMAC0: ethernet@ef600c00 {

				device_type = "network";

				compatible = "ibm,emac4sync";

				interrupt-parent = <&EMAC0>;

				interrupts = <0x0 0x1>;

				#interrupt-cells = <1>;

				#address-cells = <0>;

				#size-cells = <0>;

				interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4

						 /*Wake*/   0x1 &UIC2 0x14 0x4>;

				reg = <0xef600c00 0x000000c4>;

				local-mac-address = [000000000000]; /* Filled in by U-Boot */

				mal-device = <&MAL0>;

				mal-tx-channel = <0>;

				mal-rx-channel = <0>;

				cell-index = <0>;

				max-frame-size = <9000>;

				rx-fifo-size = <16384>;

				tx-fifo-size = <2048>;

				phy-mode = "rgmii";

				phy-map = <0x00000000>;

				rgmii-device = <&RGMII0>;

				rgmii-channel = <0>;

				tah-device = <&TAH0>;

				tah-channel = <0>;

				has-inverted-stacr-oc;

				has-new-stacr-staopc;

			};

		};



	};

};

arch/powerpc/boot/dts/mpc8308_p1m.dts

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+332 −0
Original line number Diff line number Diff line 
/*

 * mpc8308_p1m Device Tree Source

 *

 * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */



/dts-v1/;



/ {

	compatible = "denx,mpc8308_p1m";

	#address-cells = <1>;

	#size-cells = <1>;



	aliases {

		ethernet0 = &enet0;

		ethernet1 = &enet1;

		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		PowerPC,8308@0 {

			device_type = "cpu";

			reg = <0x0>;

			d-cache-line-size = <32>;

			i-cache-line-size = <32>;

			d-cache-size = <16384>;

			i-cache-size = <16384>;

			timebase-frequency = <0>;	// from bootloader

			bus-frequency = <0>;		// from bootloader

			clock-frequency = <0>;		// from bootloader

		};

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x08000000>;	// 128MB at 0

	};



	localbus@e0005000 {

		#address-cells = <2>;

		#size-cells = <1>;

		compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";

		reg = <0xe0005000 0x1000>;

		interrupts = <77 0x8>;

		interrupt-parent = <&ipic>;



		ranges = <0x0 0x0 0xfc000000 0x04000000

		          0x1 0x0 0xfbff0000 0x00008000

		          0x2 0x0 0xfbff8000 0x00008000>;



		flash@0,0 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "cfi-flash";

			reg = <0x0 0x0 0x4000000>;

			bank-width = <2>;

			device-width = <1>;



			u-boot@0 {

				reg = <0x0 0x60000>;

				read-only;

			};

			env@60000 {

				reg = <0x60000 0x20000>;

			};

			env1@80000 {

				reg = <0x80000 0x20000>;

			};

			kernel@a0000 {

				reg = <0xa0000 0x200000>;

			};

			dtb@2a0000 {

				reg = <0x2a0000 0x20000>;

			};

			ramdisk@2c0000 {

				reg = <0x2c0000 0x640000>;

			};

			user@700000 {

				reg = <0x700000 0x3900000>;

			};

		};



		can@1,0 {

			compatible = "nxp,sja1000";

			reg = <0x1 0x0 0x80>;

			interrupts = <18 0x8>;

			interrups-parent = <&ipic>;

		};



		cpld@2,0 {

			compatible = "denx,mpc8308_p1m-cpld";

			reg = <0x2 0x0 0x8>;

			interrupts = <48 0x8>;

			interrups-parent = <&ipic>;

		};

	};



	immr@e0000000 {

		#address-cells = <1>;

		#size-cells = <1>;

		device_type = "soc";

		compatible = "fsl,mpc8308-immr", "simple-bus";

		ranges = <0 0xe0000000 0x00100000>;

		reg = <0xe0000000 0x00000200>;

		bus-frequency = <0>;



		i2c@3000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl-i2c";

			reg = <0x3000 0x100>;

			interrupts = <14 0x8>;

			interrupt-parent = <&ipic>;

			dfsrr;

			fram@50 {

				compatible = "ramtron,24c64";

				reg = <0x50>;

			};

		};



		i2c@3100 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl-i2c";

			reg = <0x3100 0x100>;

			interrupts = <15 0x8>;

			interrupt-parent = <&ipic>;

			dfsrr;

			pwm@28 {

				compatible = "maxim,ds1050";

				reg = <0x28>;

			};

			sensor@48 {

				compatible = "maxim,max6625";

				reg = <0x48>;

			};

			sensor@49 {

				compatible = "maxim,max6625";

				reg = <0x49>;

			};

			sensor@4b {

				compatible = "maxim,max6625";

				reg = <0x4b>;

			};

		};



		usb@23000 {

			compatible = "fsl-usb2-dr";

			reg = <0x23000 0x1000>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupt-parent = <&ipic>;

			interrupts = <38 0x8>;

			dr_mode = "peripheral";

			phy_type = "ulpi";

		};



		enet0: ethernet@24000 {

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x24000 0x1000>;



			cell-index = <0>;

			device_type = "network";

			model = "eTSEC";

			compatible = "gianfar";

			reg = <0x24000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <32 0x8 33 0x8 34 0x8>;

			interrupt-parent = <&ipic>;

			phy-handle = < &phy1 >;



			mdio@520 {

				#address-cells = <1>;

				#size-cells = <0>;

				compatible = "fsl,gianfar-mdio";

				reg = <0x520 0x20>;

				phy1: ethernet-phy@1 {

					interrupt-parent = <&ipic>;

					interrupts = <17 0x8>;

					reg = <0x1>;

					device_type = "ethernet-phy";

				};

				phy2: ethernet-phy@2 {

					interrupt-parent = <&ipic>;

					interrupts = <19 0x8>;

					reg = <0x2>;

					device_type = "ethernet-phy";

				};

				tbi0: tbi-phy@11 {

					reg = <0x11>;

					device_type = "tbi-phy";

				};

			};

		};



		enet1: ethernet@25000 {

			#address-cells = <1>;

			#size-cells = <1>;

			cell-index = <1>;

			device_type = "network";

			model = "eTSEC";

			compatible = "gianfar";

			reg = <0x25000 0x1000>;

			ranges = <0x0 0x25000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <35 0x8 36 0x8 37 0x8>;

			interrupt-parent = <&ipic>;

			phy-handle = < &phy2 >;



			mdio@520 {

				#address-cells = <1>;

				#size-cells = <0>;

				compatible = "fsl,gianfar-tbi";

				reg = <0x520 0x20>;

				tbi1: tbi-phy@11 {

					reg = <0x11>;

					device_type = "tbi-phy";

				};

			};

		};



		serial0: serial@4500 {

			cell-index = <0>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4500 0x100>;

			clock-frequency = <133333333>;

			interrupts = <9 0x8>;

			interrupt-parent = <&ipic>;

		};



		serial1: serial@4600 {

			cell-index = <1>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4600 0x100>;

			clock-frequency = <133333333>;

			interrupts = <10 0x8>;

			interrupt-parent = <&ipic>;

		};



		gpio@c00 {

			#gpio-cells = <2>;

			compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";

			reg = <0xc00 0x18>;

			interrupts = <74 0x8>;

			interrupt-parent = <&ipic>;

			gpio-controller;

		};



		timer@500 {

			compatible = "fsl,mpc8308-gtm", "fsl,gtm";

			reg = <0x500 0x100>;

			interrupts = <90 8 78 8 84 8 72 8>;

			interrupt-parent = <&ipic>;

			clock-frequency = <133333333>;

		};



		/* IPIC

		 * interrupts cell = <intr #, sense>

		 * sense values match linux IORESOURCE_IRQ_* defines:

		 * sense == 8: Level, low assertion

		 * sense == 2: Edge, high-to-low change

		 */

		ipic: interrupt-controller@700 {

			compatible = "fsl,ipic";

			interrupt-controller;

			#address-cells = <0>;

			#interrupt-cells = <2>;

			reg = <0x700 0x100>;

			device_type = "ipic";

		};



		ipic-msi@7c0 {

			compatible = "fsl,ipic-msi";

			reg = <0x7c0 0x40>;

			msi-available-ranges = <0x0 0x100>;

			interrupts = < 0x43 0x8

					0x4  0x8

					0x51 0x8

					0x52 0x8

					0x56 0x8

					0x57 0x8

					0x58 0x8

					0x59 0x8 >;

			interrupt-parent = < &ipic >;

		};



	};



	pci0: pcie@e0009000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";

		reg = <0xe0009000 0x00001000

			0xb0000000 0x01000000>;

		ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000

		          0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;

		bus-range = <0 0>;

		interrupt-map-mask = <0 0 0 0>;

		interrupt-map = <0 0 0 0 &ipic 1 8>;

		interrupts = <0x1 0x8>;

		interrupt-parent = <&ipic>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xa0000000

				  0x02000000 0 0xa0000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};

};

arch/powerpc/boot/dts/p1022ds.dts

+11 −0
Original line number Diff line number Diff line
@@ -148,6 +148,17 @@ 
				label = "reserved-nand";

			};

		};



		board-control@3,0 {

			compatible = "fsl,p1022ds-pixis";

			reg = <3 0 0x30>;

			interrupt-parent = <&mpic>;

			/*

			 * IRQ8 is generated if the "EVENT" switch is pressed

			 * and PX_CTL[EVESEL] is set to 00.

			 */

			interrupts = <8 8>;

		};

	};



	soc@fffe00000 {

arch/powerpc/configs/44x/bluestone_defconfig

0 → 100644
+68 −0
Original line number Diff line number Diff line 
CONFIG_44x=y

CONFIG_EXPERIMENTAL=y

CONFIG_SYSVIPC=y

CONFIG_POSIX_MQUEUE=y

CONFIG_LOG_BUF_SHIFT=14

CONFIG_BLK_DEV_INITRD=y

CONFIG_EMBEDDED=y

# CONFIG_VM_EVENT_COUNTERS is not set

# CONFIG_PCI_QUIRKS is not set

# CONFIG_COMPAT_BRK is not set

CONFIG_BLUESTONE=y

# CONFIG_EBONY is not set

# CONFIG_KVM_GUEST is not set

CONFIG_NO_HZ=y

CONFIG_HIGH_RES_TIMERS=y

CONFIG_SPARSE_IRQ=y

CONFIG_CMDLINE_BOOL=y

CONFIG_CMDLINE=""

CONFIG_NET=y

CONFIG_PACKET=y

CONFIG_UNIX=y

CONFIG_INET=y

CONFIG_IP_PNP=y

CONFIG_IP_PNP_DHCP=y

CONFIG_IP_PNP_BOOTP=y

CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"

CONFIG_CONNECTOR=y

CONFIG_MTD=y

CONFIG_MTD_PARTITIONS=y

CONFIG_MTD_CMDLINE_PARTS=y

CONFIG_MTD_OF_PARTS=y

CONFIG_MTD_CHAR=y

CONFIG_MTD_BLOCK=y

CONFIG_MTD_CFI=y

CONFIG_MTD_CFI_AMDSTD=y

CONFIG_MTD_PHYSMAP_OF=y

CONFIG_PROC_DEVICETREE=y

CONFIG_BLK_DEV_RAM=y

CONFIG_BLK_DEV_RAM_SIZE=35000

CONFIG_NETDEVICES=y

CONFIG_NET_ETHERNET=y

CONFIG_IBM_NEW_EMAC=y

CONFIG_IBM_NEW_EMAC_RXB=256

CONFIG_IBM_NEW_EMAC_TXB=256

CONFIG_SERIAL_8250=y

CONFIG_SERIAL_8250_CONSOLE=y

CONFIG_SERIAL_8250_NR_UARTS=2

CONFIG_SERIAL_8250_RUNTIME_UARTS=2

CONFIG_SERIAL_8250_EXTENDED=y

CONFIG_SERIAL_8250_SHARE_IRQ=y

CONFIG_SERIAL_OF_PLATFORM=y

CONFIG_I2C=y

CONFIG_I2C_CHARDEV=y

CONFIG_I2C_IBM_IIC=y

CONFIG_SENSORS_AD7414=y

# CONFIG_HID_SUPPORT is not set

# CONFIG_USB_SUPPORT is not set

CONFIG_RTC_CLASS=y

CONFIG_RTC_DRV_M41T80=y

CONFIG_EXT2_FS=y

CONFIG_EXT3_FS=y

CONFIG_PROC_KCORE=y

CONFIG_TMPFS=y

CONFIG_CRAMFS=y

CONFIG_NFS_FS=y

CONFIG_NFS_V3=y

CONFIG_ROOT_NFS=y

CONFIG_NLS=y

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