thermal: stm32: Fix icifr register name (d401652c) · Commits · 戴 / test

drivers/thermal/st/stm_thermal.c

+5 −5

Original line number	Diff line number	Diff line
		@@ -30,7 +30,7 @@
		#define DTS_DR_OFFSET 0x1C
		#define DTS_SR_OFFSET 0x20
		#define DTS_ITENR_OFFSET 0x24
		#define DTS_CIFR_OFFSET 0x28
		#define DTS_ICIFR_OFFSET 0x28

		/* DTS_CFGR1 register mask definitions */
		#define HSREF_CLK_DIV_MASK GENMASK(30, 24)
		@@ -122,10 +122,10 @@ static irqreturn_t stm_thermal_alarm_irq_thread(int irq, void *sdata)
		value = readl_relaxed(sensor->base + DTS_SR_OFFSET);

		if ((value & LOW_THRESHOLD) == LOW_THRESHOLD)
		writel_relaxed(LOW_THRESHOLD, sensor->base + DTS_CIFR_OFFSET);
		writel_relaxed(LOW_THRESHOLD, sensor->base + DTS_ICIFR_OFFSET);

		if ((value & HIGH_THRESHOLD) == HIGH_THRESHOLD)
		writel_relaxed(HIGH_THRESHOLD, sensor->base + DTS_CIFR_OFFSET);
		writel_relaxed(HIGH_THRESHOLD, sensor->base + DTS_ICIFR_OFFSET);

		thermal_zone_device_update(sensor->th_dev, THERMAL_EVENT_UNSPECIFIED);

		@@ -347,7 +347,7 @@ static int stm_enable_irq(struct stm_thermal_sensor *sensor)
		*/

		/* Make sure LOW_THRESHOLD IT is clear before enabling */
		writel_relaxed(LOW_THRESHOLD, sensor->base + DTS_CIFR_OFFSET);
		writel_relaxed(LOW_THRESHOLD, sensor->base + DTS_ICIFR_OFFSET);

		/* Enable IT generation for low threshold */
		value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET);
		@@ -356,7 +356,7 @@ static int stm_enable_irq(struct stm_thermal_sensor *sensor)
		/* Enable the low temperature threshold if needed */
		if (sensor->low_temp_enabled) {
		/* Make sure HIGH_THRESHOLD IT is clear before enabling */
		writel_relaxed(HIGH_THRESHOLD, sensor->base + DTS_CIFR_OFFSET);
		writel_relaxed(HIGH_THRESHOLD, sensor->base + DTS_ICIFR_OFFSET);

		/* Enable IT generation for high threshold */
		value \|= HIGH_THRESHOLD;

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