Commit d30e8412 authored by Michael Tretter's avatar Michael Tretter Committed by Mauro Carvalho Chehab
Browse files

media: allegro: encode bit fields separately 



Even bits in bitfields do not keep their position, but move around or
move to other bitfields. Therefore, the driver has to handle bitfields
differently depending on the firmware version.

Create separate fields for the options that have been in bitfields and
handle the bitfields when encoding the message.

As a side effect, this makes the messages a bit more readable.

Signed-off-by: default avatarMichael Tretter <m.tretter@pengutronix.de>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 62ed97df

drivers/staging/media/allegro-dvt/allegro-core.c

+11 −4
Original line number Diff line number Diff line
@@ -913,10 +913,17 @@ static int fill_create_channel_param(struct allegro_channel *channel, 
	param->codec = channel->codec;

	param->level = v4l2_level_to_mcu_level(channel->level);

	param->tier = 0;

	param->sps_param = BIT(20) | 0x4a;

	param->pps_param = BIT(2);

	param->enc_option = AL_OPT_RDO_COST_MODE | AL_OPT_LF_X_TILE |

			    AL_OPT_LF_X_SLICE | AL_OPT_LF;



	param->log2_max_poc = 10;

	param->log2_max_frame_num = 4;

	param->temporal_mvp_enable = 1;



	param->dbf_ovr_en = 1;

	param->rdo_cost_mode = 1;

	param->lf = 1;

	param->lf_x_tile = 1;

	param->lf_x_slice = 1;



	param->beta_offset = -1;

	param->tc_offset = -1;

	param->num_slices = 1;

drivers/staging/media/allegro-dvt/allegro-mail.c

+19 −3
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ static ssize_t 
allegro_encode_channel_config(u32 *dst, struct create_channel_param *param)

{

	unsigned int i = 0;

	u32 val;

	unsigned int codec = settings_get_mcu_codec(param);



	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->height) |
@@ -81,9 +82,24 @@ allegro_encode_channel_config(u32 *dst, struct create_channel_param *param) 
		   FIELD_PREP(GENMASK(7, 0), param->profile);

	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->tier) |

		   FIELD_PREP(GENMASK(15, 0), param->level);

	dst[i++] = param->sps_param;

	dst[i++] = param->pps_param;

	dst[i++] = param->enc_option;



	val = 0;

	val |= param->temporal_mvp_enable ? BIT(20) : 0;

	val |= FIELD_PREP(GENMASK(7, 4), param->log2_max_frame_num) |

	       FIELD_PREP(GENMASK(3, 0), param->log2_max_poc);

	dst[i++] = val;



	val = 0;

	val |= param->dbf_ovr_en ? BIT(2) : 0;

	dst[i++] = val;



	val = 0;

	val |= param->lf ? BIT(2) : 0;

	val |= param->lf_x_tile ? BIT(3) : 0;

	val |= param->lf_x_slice ? BIT(4) : 0;

	val |= param->rdo_cost_mode ? BIT(20) : 0;

	dst[i++] = val;



	dst[i++] = FIELD_PREP(GENMASK(15, 8), param->beta_offset) |

		   FIELD_PREP(GENMASK(7, 0), param->tc_offset);

	dst[i++] = param->unknown11;

drivers/staging/media/allegro-dvt/allegro-mail.h

+8 −24
Original line number Diff line number Diff line
@@ -51,30 +51,14 @@ struct create_channel_param { 
	u32 codec;

	u16 level;

	u16 tier;

	u32 sps_param;

	u32 pps_param;



	u32 enc_option;

#define AL_OPT_WPP			BIT(0)

#define AL_OPT_TILE			BIT(1)

#define AL_OPT_LF			BIT(2)

#define AL_OPT_LF_X_SLICE		BIT(3)

#define AL_OPT_LF_X_TILE		BIT(4)

#define AL_OPT_SCL_LST			BIT(5)

#define AL_OPT_CONST_INTRA_PRED		BIT(6)

#define AL_OPT_QP_TAB_RELATIVE		BIT(7)

#define AL_OPT_FIX_PREDICTOR		BIT(8)

#define AL_OPT_CUSTOM_LDA		BIT(9)

#define AL_OPT_ENABLE_AUTO_QP		BIT(10)

#define AL_OPT_ADAPT_AUTO_QP		BIT(11)

#define AL_OPT_TRANSFO_SKIP		BIT(13)

#define AL_OPT_FORCE_REC		BIT(15)

#define AL_OPT_FORCE_MV_OUT		BIT(16)

#define AL_OPT_FORCE_MV_CLIP		BIT(17)

#define AL_OPT_LOWLAT_SYNC		BIT(18)

#define AL_OPT_LOWLAT_INT		BIT(19)

#define AL_OPT_RDO_COST_MODE		BIT(20)



	u32 log2_max_poc;

	u32 log2_max_frame_num;

	u32 temporal_mvp_enable;

	u32 dbf_ovr_en;

	u32 rdo_cost_mode;

	u32 lf;

	u32 lf_x_tile;

	u32 lf_x_slice;

	s8 beta_offset;

	s8 tc_offset;

	u16 reserved10;

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