Commit d2afcc44 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/sdvo: use intel_de_*() functions for register access 



The implicit "dev_priv" local variable use has been a long-standing pain
point in the register access macros I915_READ(), I915_WRITE(),
POSTING_READ(), I915_READ_FW(), and I915_WRITE_FW().

Replace them with the corresponding new display engine register
accessors intel_de_read(), intel_de_write(), intel_de_posting_read(),
intel_de_read_fw(), and intel_de_write_fw().

No functional changes.

Generated using the following semantic patch:

@@
expression REG, OFFSET;
@@
- I915_READ(REG)
+ intel_de_read(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- POSTING_READ(REG)
+ intel_de_posting_read(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- I915_WRITE(REG, OFFSET)
+ intel_de_write(dev_priv, REG, OFFSET)

@@
expression REG;
@@
- I915_READ_FW(REG)
+ intel_de_read_fw(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- I915_WRITE_FW(REG, OFFSET)
+ intel_de_write_fw(dev_priv, REG, OFFSET)

Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b21dbc3c0f349345619590893c8ab96828c39103.1579871655.git.jani.nikula@intel.com
parent 0fac5a7c

drivers/gpu/drm/i915/display/intel_sdvo.c

+15 −15
Original line number Diff line number Diff line
@@ -217,23 +217,23 @@ static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 
	int i;



	if (HAS_PCH_SPLIT(dev_priv)) {

		I915_WRITE(intel_sdvo->sdvo_reg, val);

		POSTING_READ(intel_sdvo->sdvo_reg);

		intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);

		intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);

		/*

		 * HW workaround, need to write this twice for issue

		 * that may result in first write getting masked.

		 */

		if (HAS_PCH_IBX(dev_priv)) {

			I915_WRITE(intel_sdvo->sdvo_reg, val);

			POSTING_READ(intel_sdvo->sdvo_reg);

			intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);

			intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);

		}

		return;

	}



	if (intel_sdvo->port == PORT_B)

		cval = I915_READ(GEN3_SDVOC);

		cval = intel_de_read(dev_priv, GEN3_SDVOC);

	else

		bval = I915_READ(GEN3_SDVOB);

		bval = intel_de_read(dev_priv, GEN3_SDVOB);



	/*

	 * Write the registers twice for luck. Sometimes,
@@ -241,11 +241,11 @@ static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 
	 * The BIOS does this too. Yay, magic

	 */

	for (i = 0; i < 2; i++) {

		I915_WRITE(GEN3_SDVOB, bval);

		POSTING_READ(GEN3_SDVOB);

		intel_de_write(dev_priv, GEN3_SDVOB, bval);

		intel_de_posting_read(dev_priv, GEN3_SDVOB);



		I915_WRITE(GEN3_SDVOC, cval);

		POSTING_READ(GEN3_SDVOC);

		intel_de_write(dev_priv, GEN3_SDVOC, cval);

		intel_de_posting_read(dev_priv, GEN3_SDVOC);

	}

}
@@ -1525,7 +1525,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, 
		if (INTEL_GEN(dev_priv) < 5)

			sdvox |= SDVO_BORDER_ENABLE;

	} else {

		sdvox = I915_READ(intel_sdvo->sdvo_reg);

		sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);

		if (intel_sdvo->port == PORT_B)

			sdvox &= SDVOB_PRESERVE_MASK;

		else
@@ -1571,7 +1571,7 @@ bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv, 
{

	u32 val;



	val = I915_READ(sdvo_reg);

	val = intel_de_read(dev_priv, sdvo_reg);



	/* asserts want to know the pipe even if the port is disabled */

	if (HAS_PCH_CPT(dev_priv))
@@ -1614,7 +1614,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder, 


	pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);



	sdvox = I915_READ(intel_sdvo->sdvo_reg);

	sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);



	ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);

	if (!ret) {
@@ -1741,7 +1741,7 @@ static void intel_disable_sdvo(struct intel_encoder *encoder, 
		intel_sdvo_set_encoder_power_state(intel_sdvo,

						   DRM_MODE_DPMS_OFF);



	temp = I915_READ(intel_sdvo->sdvo_reg);

	temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);



	temp &= ~SDVO_ENABLE;

	intel_sdvo_write_sdvox(intel_sdvo, temp);
@@ -1798,7 +1798,7 @@ static void intel_enable_sdvo(struct intel_encoder *encoder, 
	int i;

	bool success;



	temp = I915_READ(intel_sdvo->sdvo_reg);

	temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);

	temp |= SDVO_ENABLE;

	intel_sdvo_write_sdvox(intel_sdvo, temp);

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