Commit d2abc982 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Vinod Koul
Browse files

dmaengine: ti: k3-udma: Initial support for K3 PKTDMA 



One of the DMAs introduced with AM64 is the Packet DMA (PKTDMA).
It serves similar purpose as K3 UDMAP channels in packet mode, but with
notable differences, like tflow support and channels being allocated to
service specific peripherals.
The rings for the PKTDMA is integrated within the DMA itself instead of
using rings from the general purpose ringacc.

PKTDMA can be used to service PSI-L peripherals, similarly to
K3 UDMA channels.

Most of the driver code can be reused for PKTDMA tchan/rchan support but
new setup and allocation functions are needed to handle the differences
between the DMAs.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20201208090440.31792-20-peter.ujfalusi@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 88448980

drivers/dma/ti/k3-udma-private.c

+9 −0
Original line number Diff line number Diff line
@@ -88,6 +88,9 @@ EXPORT_SYMBOL(xudma_free_gp_rflow_range); 


bool xudma_rflow_is_gp(struct udma_dev *ud, int id)

{

	if (!ud->rflow_gp_map)

		return false;



	return !test_bit(id, ud->rflow_gp_map);

}

EXPORT_SYMBOL(xudma_rflow_is_gp);
@@ -119,6 +122,12 @@ void xudma_rflow_put(struct udma_dev *ud, struct udma_rflow *p) 
}

EXPORT_SYMBOL(xudma_rflow_put);



int xudma_get_rflow_ring_offset(struct udma_dev *ud)

{

	return ud->tflow_cnt;

}

EXPORT_SYMBOL(xudma_get_rflow_ring_offset);



#define XUDMA_GET_RESOURCE_ID(res)					\

int xudma_##res##_get_id(struct udma_##res *p)				\

{									\

drivers/dma/ti/k3-udma.c

+520 −25

File changed.

Preview size limit exceeded, changes collapsed.

drivers/dma/ti/k3-udma.h

+4 −0
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ 
#define BCDMA_CAP4_HTCHAN_CNT(val)	(((val) >> 16) & 0xff)

#define BCDMA_CAP4_UTCHAN_CNT(val)	(((val) >> 24) & 0xff)



#define PKTDMA_CAP4_TFLOW_CNT(val)	((val) & 0x3fff)



/* UDMA_CHAN_RT_CTL_REG */

#define UDMA_CHAN_RT_CTL_EN		BIT(31)

#define UDMA_CHAN_RT_CTL_TDOWN		BIT(30)
@@ -105,6 +107,7 @@ enum udma_rm_range { 
	RM_RANGE_TCHAN,

	RM_RANGE_RCHAN,

	RM_RANGE_RFLOW,

	RM_RANGE_TFLOW,

	RM_RANGE_LAST,

};
@@ -152,5 +155,6 @@ void xudma_tchanrt_write(struct udma_tchan *tchan, int reg, u32 val); 
u32 xudma_rchanrt_read(struct udma_rchan *rchan, int reg);

void xudma_rchanrt_write(struct udma_rchan *rchan, int reg, u32 val);

bool xudma_rflow_is_gp(struct udma_dev *ud, int id);

int xudma_get_rflow_ring_offset(struct udma_dev *ud);



#endif /* K3_UDMA_H_ */

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