Commit d29768e1 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s/exception: remove EXCEPTION_PROLOG_0/1, rename _2 



EXCEPTION_PROLOG_0 and _1 have only a single caller, so expand them
into it.

Rename EXCEPTION_PROLOG_2_REAL to INT_SAVE_SRR_AND_JUMP and
EXCEPTION_PROLOG_2_VIRT to INT_VIRT_SAVE_SRR_AND_JUMP, which are
more descriptive.

No generated code change except BUG line number constants.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190802105709.27696-24-npiggin@gmail.com
parent 9b40f62b

arch/powerpc/kernel/exceptions-64s.S

+73 −78
Original line number Diff line number Diff line
@@ -180,77 +180,7 @@ BEGIN_FTR_SECTION_NESTED(943) \ 
	std	ra,offset(r13);						\

END_FTR_SECTION_NESTED(ftr,ftr,943)



.macro EXCEPTION_PROLOG_0 area

	SET_SCRATCH0(r13)			/* save r13 */

	GET_PACA(r13)

	std	r9,\area\()+EX_R9(r13)		/* save r9 */

	OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR)

	HMT_MEDIUM

	std	r10,\area\()+EX_R10(r13)	/* save r10 - r12 */

	OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)

.endm



.macro EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, dar, dsisr, bitmask

	OPT_SAVE_REG_TO_PACA(\area\()+EX_PPR, r9, CPU_FTR_HAS_PPR)

	OPT_SAVE_REG_TO_PACA(\area\()+EX_CFAR, r10, CPU_FTR_CFAR)

	INTERRUPT_TO_KERNEL

	SAVE_CTR(r10, \area\())

	mfcr	r9

	.if \kvm

		KVMTEST \hsrr \vec

	.endif

	.if \bitmask

		lbz	r10,PACAIRQSOFTMASK(r13)

		andi.	r10,r10,\bitmask

		/* Associate vector numbers with bits in paca->irq_happened */

		.if \vec == 0x500 || \vec == 0xea0

		li	r10,PACA_IRQ_EE

		.elseif \vec == 0x900

		li	r10,PACA_IRQ_DEC

		.elseif \vec == 0xa00 || \vec == 0xe80

		li	r10,PACA_IRQ_DBELL

		.elseif \vec == 0xe60

		li	r10,PACA_IRQ_HMI

		.elseif \vec == 0xf00

		li	r10,PACA_IRQ_PMI

		.else

		.abort "Bad maskable vector"

		.endif



		.if \hsrr == EXC_HV_OR_STD

		BEGIN_FTR_SECTION

		bne	masked_Hinterrupt

		FTR_SECTION_ELSE

		bne	masked_interrupt

		ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)

		.elseif \hsrr

		bne	masked_Hinterrupt

		.else

		bne	masked_interrupt

		.endif

	.endif



	std	r11,\area\()+EX_R11(r13)

	std	r12,\area\()+EX_R12(r13)



	/*

	 * DAR/DSISR, SCRATCH0 must be read before setting MSR[RI],

	 * because a d-side MCE will clobber those registers so is

	 * not recoverable if they are live.

	 */

	GET_SCRATCH0(r10)

	std	r10,\area\()+EX_R13(r13)

	.if \dar

	mfspr	r10,SPRN_DAR

	std	r10,\area\()+EX_DAR(r13)

	.endif

	.if \dsisr

	mfspr	r10,SPRN_DSISR

	stw	r10,\area\()+EX_DSISR(r13)

	.endif

.endm



.macro EXCEPTION_PROLOG_2_REAL label, hsrr, set_ri

.macro INT_SAVE_SRR_AND_JUMP label, hsrr, set_ri

	ld	r10,PACAKMSR(r13)	/* get MSR value for kernel */

	.if ! \set_ri

	xori	r10,r10,MSR_RI		/* Clear MSR_RI */
@@ -293,7 +223,8 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) 
	b	.	/* prevent speculative execution */

.endm



.macro EXCEPTION_PROLOG_2_VIRT label, hsrr

/* INT_SAVE_SRR_AND_JUMP works for real or virt, this is faster but virt only */

.macro INT_VIRT_SAVE_SRR_AND_JUMP label, hsrr

#ifdef CONFIG_RELOCATABLE

	.if \hsrr == EXC_HV_OR_STD

	BEGIN_FTR_SECTION
@@ -620,7 +551,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 
 *   This is done if early=2.

 */

.macro INT_HANDLER name, vec, ool=0, early=0, virt=0, hsrr=0, area=PACA_EXGEN, ri=1, dar=0, dsisr=0, bitmask=0, kvm=0

	EXCEPTION_PROLOG_0 \area

	SET_SCRATCH0(r13)			/* save r13 */

	GET_PACA(r13)

	std	r9,\area\()+EX_R9(r13)		/* save r9 */

	OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR)

	HMT_MEDIUM

	std	r10,\area\()+EX_R10(r13)	/* save r10 - r12 */

	OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)

	.if \ool

	.if !\virt

	b	tramp_real_\name
@@ -632,16 +569,74 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 
	TRAMP_VIRT_BEGIN(tramp_virt_\name)

	.endif

	.endif

	EXCEPTION_PROLOG_1 \hsrr, \area, \kvm, \vec, \dar, \dsisr, \bitmask



	OPT_SAVE_REG_TO_PACA(\area\()+EX_PPR, r9, CPU_FTR_HAS_PPR)

	OPT_SAVE_REG_TO_PACA(\area\()+EX_CFAR, r10, CPU_FTR_CFAR)

	INTERRUPT_TO_KERNEL

	SAVE_CTR(r10, \area\())

	mfcr	r9

	.if \kvm

		KVMTEST \hsrr \vec

	.endif

	.if \bitmask

		lbz	r10,PACAIRQSOFTMASK(r13)

		andi.	r10,r10,\bitmask

		/* Associate vector numbers with bits in paca->irq_happened */

		.if \vec == 0x500 || \vec == 0xea0

		li	r10,PACA_IRQ_EE

		.elseif \vec == 0x900

		li	r10,PACA_IRQ_DEC

		.elseif \vec == 0xa00 || \vec == 0xe80

		li	r10,PACA_IRQ_DBELL

		.elseif \vec == 0xe60

		li	r10,PACA_IRQ_HMI

		.elseif \vec == 0xf00

		li	r10,PACA_IRQ_PMI

		.else

		.abort "Bad maskable vector"

		.endif



		.if \hsrr == EXC_HV_OR_STD

		BEGIN_FTR_SECTION

		bne	masked_Hinterrupt

		FTR_SECTION_ELSE

		bne	masked_interrupt

		ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)

		.elseif \hsrr

		bne	masked_Hinterrupt

		.else

		bne	masked_interrupt

		.endif

	.endif



	std	r11,\area\()+EX_R11(r13)

	std	r12,\area\()+EX_R12(r13)



	/*

	 * DAR/DSISR, SCRATCH0 must be read before setting MSR[RI],

	 * because a d-side MCE will clobber those registers so is

	 * not recoverable if they are live.

	 */

	GET_SCRATCH0(r10)

	std	r10,\area\()+EX_R13(r13)

	.if \dar

	mfspr	r10,SPRN_DAR

	std	r10,\area\()+EX_DAR(r13)

	.endif

	.if \dsisr

	mfspr	r10,SPRN_DSISR

	stw	r10,\area\()+EX_DSISR(r13)

	.endif



	.if \early == 2

	/* nothing more */

	.elseif \early

	mfctr	r10			/* save ctr, even for !RELOCATABLE */

	BRANCH_TO_C000(r11, \name\()_early_common)

	.elseif !\virt

	EXCEPTION_PROLOG_2_REAL \name\()_common, \hsrr, \ri

	INT_SAVE_SRR_AND_JUMP \name\()_common, \hsrr, \ri

	.else

	EXCEPTION_PROLOG_2_VIRT \name\()_common, \hsrr

	INT_VIRT_SAVE_SRR_AND_JUMP \name\()_common, \hsrr

	.endif

	.if \ool

	.popsection
@@ -1852,7 +1847,7 @@ EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x100) 
	bne+	denorm_assist

#endif

	KVMTEST EXC_HV 0x1500

	EXCEPTION_PROLOG_2_REAL denorm_common, EXC_HV, 1

	INT_SAVE_SRR_AND_JUMP denorm_common, EXC_HV, 1

EXC_REAL_END(denorm_exception_hv, 0x1500, 0x100)



#ifdef CONFIG_PPC_DENORMALISATION
@@ -1986,7 +1981,7 @@ EXC_VIRT_NONE(0x5800, 0x100) 
	std	r12,PACA_EXGEN+EX_R12(r13);		\

	GET_SCRATCH0(r10);				\

	std	r10,PACA_EXGEN+EX_R13(r13);		\

	EXCEPTION_PROLOG_2_REAL soft_nmi_common, _H, 1

	INT_SAVE_SRR_AND_JUMP soft_nmi_common, _H, 1



/*

 * Branch to soft_nmi_interrupt using the emergency stack. The emergency

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