Commit d26b3817 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/time: Move timebase functions into new asm/vdso/timebase.h 



In order to easily use get_tb() from C VDSO, move timebase
functions into a new header named asm/vdso/timebase.h

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20201126131006.2431205-3-mpe@ellerman.id.au
parent 8f8cffd9

arch/powerpc/include/asm/reg.h

+0 −31
Original line number Diff line number Diff line
@@ -1419,37 +1419,6 @@ static inline void msr_check_and_clear(unsigned long bits) 
		__msr_check_and_clear(bits);

}



#if defined(CONFIG_PPC_CELL) || defined(CONFIG_E500)

#define mftb()		({unsigned long rval;				\

			asm volatile(					\

				"90:	mfspr %0, %2;\n"		\

				ASM_FTR_IFSET(				\

					"97:	cmpwi %0,0;\n"		\

					"	beq- 90b;\n", "", %1)	\

			: "=r" (rval) \

			: "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \

			rval;})

#elif defined(CONFIG_PPC_8xx)

#define mftb()		({unsigned long rval;	\

			asm volatile("mftbl %0" : "=r" (rval)); rval;})

#else

#define mftb()		({unsigned long rval;	\

			asm volatile("mfspr %0, %1" : \

				     "=r" (rval) : "i" (SPRN_TBRL)); rval;})

#endif /* !CONFIG_PPC_CELL */



#if defined(CONFIG_PPC_8xx)

#define mftbu()		({unsigned long rval;	\

			asm volatile("mftbu %0" : "=r" (rval)); rval;})

#else

#define mftbu()		({unsigned long rval;	\

			asm volatile("mfspr %0, %1" : "=r" (rval) : \

				"i" (SPRN_TBRU)); rval;})

#endif



#define mttbl(v)	asm volatile("mttbl %0":: "r"(v))

#define mttbu(v)	asm volatile("mttbu %0":: "r"(v))



#ifdef CONFIG_PPC32

#define mfsrin(v)	({unsigned int rval; \

			asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \

arch/powerpc/include/asm/time.h

+1 −29
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 


#include <asm/processor.h>

#include <asm/cpu_has_feature.h>

#include <asm/vdso/timebase.h>



/* time.c */

extern unsigned long tb_ticks_per_jiffy;
@@ -38,12 +39,6 @@ struct div_result { 
	u64 result_low;

};



/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */

static inline unsigned long get_tbl(void)

{

	return mftb();

}



static inline u64 get_vtb(void)

{

#ifdef CONFIG_PPC_BOOK3S_64
@@ -53,29 +48,6 @@ static inline u64 get_vtb(void) 
	return 0;

}



static inline u64 get_tb(void)

{

	unsigned int tbhi, tblo, tbhi2;



	if (IS_ENABLED(CONFIG_PPC64))

		return mftb();



	do {

		tbhi = mftbu();

		tblo = mftb();

		tbhi2 = mftbu();

	} while (tbhi != tbhi2);



	return ((u64)tbhi << 32) | tblo;

}



static inline void set_tb(unsigned int upper, unsigned int lower)

{

	mtspr(SPRN_TBWL, 0);

	mtspr(SPRN_TBWU, upper);

	mtspr(SPRN_TBWL, lower);

}



/* Accessor functions for the decrementer register.

 * The 4xx doesn't even have a decrementer.  I tried to use the

 * generic timer interrupt code, which seems OK, with the 4xx PIT

arch/powerpc/include/asm/timex.h

+1 −1
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ 
 */



#include <asm/cputable.h>

#include <asm/reg.h>

#include <asm/vdso/timebase.h>



#define CLOCK_TICK_RATE	1024000 /* Underlying HZ */

arch/powerpc/include/asm/vdso/timebase.h

0 → 100644
+71 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * Common timebase prototypes and such for all ppc machines.

 */



#ifndef _ASM_POWERPC_VDSO_TIMEBASE_H

#define _ASM_POWERPC_VDSO_TIMEBASE_H



#include <asm/reg.h>



#if defined(CONFIG_PPC_CELL) || defined(CONFIG_E500)

#define mftb()		({unsigned long rval;				\

			asm volatile(					\

				"90:	mfspr %0, %2;\n"		\

				ASM_FTR_IFSET(				\

					"97:	cmpwi %0,0;\n"		\

					"	beq- 90b;\n", "", %1)	\

			: "=r" (rval) \

			: "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \

			rval;})

#elif defined(CONFIG_PPC_8xx)

#define mftb()		({unsigned long rval;	\

			asm volatile("mftbl %0" : "=r" (rval)); rval;})

#else

#define mftb()		({unsigned long rval;	\

			asm volatile("mfspr %0, %1" : \

				     "=r" (rval) : "i" (SPRN_TBRL)); rval;})

#endif /* !CONFIG_PPC_CELL */



#if defined(CONFIG_PPC_8xx)

#define mftbu()		({unsigned long rval;	\

			asm volatile("mftbu %0" : "=r" (rval)); rval;})

#else

#define mftbu()		({unsigned long rval;	\

			asm volatile("mfspr %0, %1" : "=r" (rval) : \

				"i" (SPRN_TBRU)); rval;})

#endif



#define mttbl(v)	asm volatile("mttbl %0":: "r"(v))

#define mttbu(v)	asm volatile("mttbu %0":: "r"(v))



/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */

static inline unsigned long get_tbl(void)

{

	return mftb();

}



static inline u64 get_tb(void)

{

	unsigned int tbhi, tblo, tbhi2;



	if (IS_ENABLED(CONFIG_PPC64))

		return mftb();



	do {

		tbhi = mftbu();

		tblo = mftb();

		tbhi2 = mftbu();

	} while (tbhi != tbhi2);



	return ((u64)tbhi << 32) | tblo;

}



static inline void set_tb(unsigned int upper, unsigned int lower)

{

	mtspr(SPRN_TBWL, 0);

	mtspr(SPRN_TBWU, upper);

	mtspr(SPRN_TBWL, lower);

}



#endif /* _ASM_POWERPC_VDSO_TIMEBASE_H */

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