Commit d25b4553 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'stm32-dt-for-v4.13-1' of... 

Merge tag 'stm32-dt-for-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

STM32 DT updates for v4.13, round 1

Highlights:
----------
 - Add stm32h743-disco board support
 - Add stm32f746-disco board support
 - Add stm32f769-disco board support
 - Enable LTDC & simple pannel on stm32f429-eval
 - Enable Watchdog on stm32f429-eval
 - Enable DCMI on stm32f429-eval
 - Enable STMPE1600 io expander on stm32f429-eval
 - Enable OV2640 camera on stm32f429-eval
 - Enable CRC on stm32f429-eval & stm32f429-disco

* tag 'stm32-dt-for-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32

:
  ARM: dts: stm32: Add stm32h743i-disco board
  ARM: dts: stm32: Add usart2 support on stm32h743
  ARM: dts: stm32: Add usart2_pins on stm32h743
  ARM: dts: stm32: enable CRC32 on stm32429i-eval board
  ARM: dts: stm32: enable CRC32 on stm32429-disco board
  ARM: dts: stm32: Add CRC support to stm32f429
  ARM: dts: stm32: Enable OV2640 camera support of STM32F429-EVAL board
  ARM: dts: stm32: Enable STMPE1600 gpio expander of STM32F429-EVAL board
  ARM: dts: stm32: Enable DCMI camera interface on STM32F429-EVAL board
  ARM: dts: stm32: Enable DCMI support on STM32F429 MCU
  ARM: dts: stm32: Add missing reset-cells node in stm32f746
  ARM: dts: stm32: Set gpio controller as interrupt controller on F4 and F7
  ARM: dts: stm32: Add watchdog support for STM32F429 eval board
  ARM: dts: stm32: Add watchdog support for STM32F429 SoC
  ARM: dts: stm32: Enable ltdc & simple panel on stm32f429-Eval board
  ARM: dts: stm32: Add ltdc support on stm32f429 MCU
  ARM: dts: stm32: add stm32f769I & stm32f746 discovery board support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 226fe7c1 43707464

arch/arm/boot/dts/Makefile

+4 −1
Original line number Diff line number Diff line
@@ -792,9 +792,12 @@ dtb-$(CONFIG_ARCH_STI) += \ 
dtb-$(CONFIG_ARCH_STM32)+= \

	stm32f429-disco.dtb \

	stm32f469-disco.dtb \

	stm32f746-disco.dtb \

	stm32f769-disco.dtb \

	stm32429i-eval.dtb \

	stm32746g-eval.dtb \

	stm32h743i-eval.dtb

	stm32h743i-eval.dtb \

	stm32h743i-disco.dtb

dtb-$(CONFIG_MACH_SUN4I) += \

	sun4i-a10-a1000.dtb \

	sun4i-a10-ba10-tvbox.dtb \

arch/arm/boot/dts/stm32429i-eval.dts

+88 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ 
/dts-v1/;

#include "stm32f429.dtsi"

#include <dt-bindings/input/input.h>

#include <dt-bindings/gpio/gpio.h>



/ {

	model = "STMicroelectronics STM32429i-EVAL board";
@@ -66,6 +67,14 @@ 
		serial0 = &usart1;

	};



	clocks {

		clk_ext_camera: clk-ext-camera {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <24000000>;

		};

	};



	soc {

		dma-ranges = <0xc0000000 0x0 0x10000000>;

	};
@@ -124,6 +133,16 @@ 
		clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHSULPI)>;

		clock-names = "main_clk";

	};



	panel_rgb: panel-rgb {

		compatible = "ampire,am-480272h3tmqw-t01h";

		status = "okay";

		port {

			panel_in_rgb: endpoint {

				remote-endpoint = <&ltdc_out_rgb>;

			};

		};

	};

};



&adc {
@@ -141,10 +160,79 @@ 
	clock-frequency = <25000000>;

};



&crc {

	status = "okay";

};



&dcmi {

	status = "okay";



	port {

		dcmi_0: endpoint {

			remote-endpoint = <&ov2640_0>;

			bus-width = <8>;

			hsync-active = <0>;

			vsync-active = <0>;

			pclk-sample = <1>;

		};

	};

};



&i2c1 {

	pinctrl-0 = <&i2c1_pins>;

	pinctrl-names = "default";

	status = "okay";



	ov2640: camera@30 {

		compatible = "ovti,ov2640";

		reg = <0x30>;

		resetb-gpios = <&stmpegpio 2 GPIO_ACTIVE_HIGH>;

		pwdn-gpios = <&stmpegpio 0 GPIO_ACTIVE_LOW>;

		clocks = <&clk_ext_camera>;

		clock-names = "xvclk";

		status = "okay";



		port {

			ov2640_0: endpoint {

				remote-endpoint = <&dcmi_0>;

			};

		};

	};



	stmpe1600: stmpe1600@42 {

		compatible = "st,stmpe1600";

		reg = <0x42>;

		irq-gpio = <&gpioi 8 0>;

		irq-trigger = <3>;

		interrupts = <8 3>;

		interrupt-parent = <&exti>;

		interrupt-controller;

		wakeup-source;



		stmpegpio: stmpe_gpio {

			compatible = "st,stmpe-gpio";

			gpio-controller;

			#gpio-cells = <2>;

		};

	};

};



&iwdg {

	status = "okay";

	timeout-sec = <32>;

};



&ltdc {

	status = "okay";

	pinctrl-0 = <&ltdc_pins>;

	pinctrl-names = "default";

	dma-ranges;



	port {

		ltdc_out_rgb: endpoint {

			remote-endpoint = <&panel_in_rgb>;

		};

	};

};



&mac {

arch/arm/boot/dts/stm32f429-disco.dts

+4 −0
Original line number Diff line number Diff line
@@ -102,6 +102,10 @@ 
	clock-frequency = <8000000>;

};



&crc {

	status = "okay";

};



&rtc {

	assigned-clocks = <&rcc 1 CLK_RTC>;

	assigned-clock-parents = <&rcc 1 CLK_LSI>;

arch/arm/boot/dts/stm32f429.dtsi

+119 −2
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ 
			clock-frequency = <32768>;

		};



		clk-lsi {

		clk_lsi: clk-lsi {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <32000>;
@@ -307,6 +307,13 @@ 
			status = "disabled";

		};



		iwdg: watchdog@40003000 {

			compatible = "st,stm32-iwdg";

			reg = <0x40003000 0x400>;

			clocks = <&clk_lsi>;

			status = "disabled";

		};



		usart2: serial@40004400 {

			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40004400 0x400>;
@@ -549,7 +556,17 @@ 
			reg = <0x40007000 0x400>;

		};



		pin-controller {

		ltdc: display-controller@40016800 {

			compatible = "st,stm32-ltdc";

			reg = <0x40016800 0x200>;

			interrupts = <88>, <89>;

			resets = <&rcc STM32F4_APB2_RESET(LTDC)>;

			clocks = <&rcc 1 CLK_LCD>;

			clock-names = "lcd";

			status = "disabled";

		};



		pinctrl: pin-controller {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stm32f429-pinctrl";
@@ -561,6 +578,8 @@ 
			gpioa: gpio@40020000 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x0 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;

				st,bank-name = "GPIOA";
@@ -569,6 +588,8 @@ 
			gpiob: gpio@40020400 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x400 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;

				st,bank-name = "GPIOB";
@@ -577,6 +598,8 @@ 
			gpioc: gpio@40020800 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x800 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;

				st,bank-name = "GPIOC";
@@ -585,6 +608,8 @@ 
			gpiod: gpio@40020c00 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0xc00 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOD)>;

				st,bank-name = "GPIOD";
@@ -593,6 +618,8 @@ 
			gpioe: gpio@40021000 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1000 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOE)>;

				st,bank-name = "GPIOE";
@@ -601,6 +628,8 @@ 
			gpiof: gpio@40021400 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1400 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOF)>;

				st,bank-name = "GPIOF";
@@ -609,6 +638,8 @@ 
			gpiog: gpio@40021800 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1800 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOG)>;

				st,bank-name = "GPIOG";
@@ -617,6 +648,8 @@ 
			gpioh: gpio@40021c00 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1c00 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOH)>;

				st,bank-name = "GPIOH";
@@ -625,6 +658,8 @@ 
			gpioi: gpio@40022000 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2000 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOI)>;

				st,bank-name = "GPIOI";
@@ -633,6 +668,8 @@ 
			gpioj: gpio@40022400 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2400 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOJ)>;

				st,bank-name = "GPIOJ";
@@ -641,6 +678,8 @@ 
			gpiok: gpio@40022800 {

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2800 0x400>;

				clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOK)>;

				st,bank-name = "GPIOK";
@@ -764,6 +803,70 @@ 
					slew-rate = <3>;

				};

			};



			ltdc_pins: ltdc@0 {

				pins {

					pinmux = <STM32F429_PI12_FUNC_LCD_HSYNC>,

						 <STM32F429_PI13_FUNC_LCD_VSYNC>,

						 <STM32F429_PI14_FUNC_LCD_CLK>,

						 <STM32F429_PI15_FUNC_LCD_R0>,

						 <STM32F429_PJ0_FUNC_LCD_R1>,

						 <STM32F429_PJ1_FUNC_LCD_R2>,

						 <STM32F429_PJ2_FUNC_LCD_R3>,

						 <STM32F429_PJ3_FUNC_LCD_R4>,

						 <STM32F429_PJ4_FUNC_LCD_R5>,

						 <STM32F429_PJ5_FUNC_LCD_R6>,

						 <STM32F429_PJ6_FUNC_LCD_R7>,

						 <STM32F429_PJ7_FUNC_LCD_G0>,

						 <STM32F429_PJ8_FUNC_LCD_G1>,

						 <STM32F429_PJ9_FUNC_LCD_G2>,

						 <STM32F429_PJ10_FUNC_LCD_G3>,

						 <STM32F429_PJ11_FUNC_LCD_G4>,

						 <STM32F429_PJ12_FUNC_LCD_B0>,

						 <STM32F429_PJ13_FUNC_LCD_B1>,

						 <STM32F429_PJ14_FUNC_LCD_B2>,

						 <STM32F429_PJ15_FUNC_LCD_B3>,

						 <STM32F429_PK0_FUNC_LCD_G5>,

						 <STM32F429_PK1_FUNC_LCD_G6>,

						 <STM32F429_PK2_FUNC_LCD_G7>,

						 <STM32F429_PK3_FUNC_LCD_B4>,

						 <STM32F429_PK4_FUNC_LCD_B5>,

						 <STM32F429_PK5_FUNC_LCD_B6>,

						 <STM32F429_PK6_FUNC_LCD_B7>,

						 <STM32F429_PK7_FUNC_LCD_DE>;

					slew-rate = <2>;

				};

			};



			dcmi_pins: dcmi@0 {

				pins {

					pinmux = <STM32F429_PA4_FUNC_DCMI_HSYNC>,

						 <STM32F429_PB7_FUNC_DCMI_VSYNC>,

						 <STM32F429_PA6_FUNC_DCMI_PIXCLK>,

						 <STM32F429_PC6_FUNC_DCMI_D0>,

						 <STM32F429_PC7_FUNC_DCMI_D1>,

						 <STM32F429_PC8_FUNC_DCMI_D2>,

						 <STM32F429_PC9_FUNC_DCMI_D3>,

						 <STM32F429_PC11_FUNC_DCMI_D4>,

						 <STM32F429_PD3_FUNC_DCMI_D5>,

						 <STM32F429_PB8_FUNC_DCMI_D6>,

						 <STM32F429_PE6_FUNC_DCMI_D7>,

						 <STM32F429_PC10_FUNC_DCMI_D8>,

						 <STM32F429_PC12_FUNC_DCMI_D9>,

						 <STM32F429_PD6_FUNC_DCMI_D10>,

						 <STM32F429_PD2_FUNC_DCMI_D11>;

					bias-disable;

					drive-push-pull;

					slew-rate = <3>;

				};

			};

		};



		crc: crc@40023000 {

			compatible = "st,stm32f4-crc";

			reg = <0x40023000 0x400>;

			clocks = <&rcc 0 STM32F4_AHB1_CLOCK(CRC)>;

			status = "disabled";

		};



		rcc: rcc@40023810 {
@@ -842,6 +945,20 @@ 
			status = "disabled";

		};



		dcmi: dcmi@50050000 {

			compatible = "st,stm32-dcmi";

			reg = <0x50050000 0x400>;

			interrupts = <78>;

			resets = <&rcc STM32F4_AHB2_RESET(DCMI)>;

			clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>;

			clock-names = "mclk";

			pinctrl-names = "default";

			pinctrl-0 = <&dcmi_pins>;

			dmas = <&dma2 1 1 0x414 0x3>;

			dma-names = "tx";

			status = "disabled";

		};



		rng: rng@50060800 {

			compatible = "st,stm32-rng";

			reg = <0x50060800 0x400>;

arch/arm/boot/dts/stm32f746-disco.dts

0 → 100644
+74 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/dts-v1/;

#include "stm32f746.dtsi"

#include <dt-bindings/input/input.h>



/ {

	model = "STMicroelectronics STM32F746-DISCO board";

	compatible = "st,stm32f746-disco", "st,stm32f746";



	chosen {

		bootargs = "root=/dev/ram";

		stdout-path = "serial0:115200n8";

	};



	memory {

		reg = <0xC0000000 0x800000>;

	};



	aliases {

		serial0 = &usart1;

	};



};



&clk_hse {

	clock-frequency = <25000000>;

};



&usart1 {

	pinctrl-0 = <&usart1_pins_b>;

	pinctrl-names = "default";

	status = "okay";

};

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