Commit d2033f2c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC cleanups from Arnd Bergmann:
 "This contains cleanups as preparation for other branches adding new
  features, we pulled 16 branches for 9 platforms into this one.

  Most notable here is the removal of support for ATAGS based OMAP4
  systems.  Since all OMAP4 machines are fully functional with DT based
  booting in 3.10, we can remove a lot of code here.

  Also noteworthy is Maxime Ripard's cleanup of the machine descriptors,
  which means we need no machine descriptors in a lot more cases and can
  boot additional machines by just having the respective device drivers
  enabled."

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
  ARM: picoxcell: remove .nr_irqs reference
  ARM: s5p64x0: avoid build warning for uncompress.h
  ARM: SAMSUNG: Remove unused plat/regs-watchdog.h header
  ARM: SAMSUNG: Remove legacy watchdog reset code
  ARM: SAMSUNG: Let platforms use the new watchdog reset driver
  ARM: SAMSUNG: Add watchdog reset driver
  ARM: SAMSUNG: Use local definitions of watchdog registers
  watchdog: s3c2410_wdt: Use local register definitions
  ARM: S5P64X0: Use common uncompress.h part for plat-samsung
  ARM: SAMSUNG: Consolidate uncompress subroutine
  ARM: at91: drop rm9200dk board support
  ARM: dts: msm: Fix merge resolution
  ARM: OMAP1: Remove dma.h
  ARM: OMAP1: Remove legacy irda.h and irda setup from board files
  ARM: OMAP1: Remove duplicated DMA channel definitions
  ARM: OMAP1: Remove McBSP DMA channel definitions
  ARM: OMAP2+: Remove dma.h
  ARM: OMAP2+: hwmod: Remove remaining DMA channel definitions
  ARM: OMAP2+: Remove duplicated DMA channel definitions
  ARM: OMAP2+: Remove AES crypto device DMA channel definitions
  ...
parents 22237d5a 0ee8090c

Documentation/arm/sunxi/README

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Original line number Diff line number Diff line
@@ -3,17 +3,22 @@ ARM Allwinner SoCs 


This document lists all the ARM Allwinner SoCs that are currently

supported in mainline by the Linux kernel. This document will also

provide links to documentation and or datasheet for these SoCs.

provide links to documentation and/or datasheet for these SoCs.



SunXi family

------------

  Linux kernel mach directory: arch/arm/mach-sunxi



  Flavors:

        Allwinner A10 (sun4i)

                Datasheet       : http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf



        Allwinner A13 (sun5i)

                Datasheet       : http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf

    * ARM Cortex-A8 based SoCs

      - Allwinner A10 (sun4i)

        + Datasheet

	  http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf

	+ User Manual

	  http://dl.linux-sunxi.org/A10/A10%20User%20Manual%20-%20v1.20%20%282012-04-09%2c%20DECRYPTED%29.pdf



  Core: Cortex A8

  Linux kernel mach directory: arch/arm/mach-sunxi
 
 No newline at end of file
 
      - Allwinner A13 (sun5i)

        + Datasheet

	  http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf

        + User Manual

	  http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-08-08%29.pdf

Documentation/devicetree/bindings/gpio/gpio-msm.txt

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MSM GPIO controller bindings



Required properties:

- compatible:

  - "qcom,msm-gpio" for MSM controllers

- #gpio-cells : Should be two.

  - first cell is the pin number

  - second cell is used to specify optional parameters (unused)

- gpio-controller : Marks the device node as a GPIO controller.

- #interrupt-cells : Should be 2.

- interrupt-controller: Mark the device node as an interrupt controller

- interrupts : Specify the TLMM summary interrupt number

- ngpio : Specify the number of MSM GPIOs



Example:



	msmgpio: gpio@fd510000 {

		compatible = "qcom,msm-gpio";

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

		reg = <0xfd510000 0x4000>;

		interrupts = <0 208 0>;

		ngpio = <150>;

	};

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt

+2 −85
Original line number Diff line number Diff line
@@ -8,91 +8,8 @@ Required properties: 
- #interrupt-cells : Specifies the number of cells needed to encode an

  interrupt source. The value shall be 1.



The interrupt sources are as follows:



0: ENMI

1: UART0

2: UART1

3: UART2

4: UART3

5: IR0

6: IR1

7: I2C0

8: I2C1

9: I2C2

10: SPI0

11: SPI1

12: SPI2

13: SPDIF

14: AC97

15: TS

16: I2S

17: UART4

18: UART5

19: UART6

20: UART7

21: KEYPAD

22: TIMER0

23: TIMER1

24: TIMER2

25: TIMER3

26: CAN

27: DMA

28: PIO

29: TOUCH_PANEL

30: AUDIO_CODEC

31: LRADC

32: SDMC0

33: SDMC1

34: SDMC2

35: SDMC3

36: MEMSTICK

37: NAND

38: USB0

39: USB1

40: USB2

41: SCR

42: CSI0

43: CSI1

44: LCDCTRL0

45: LCDCTRL1

46: MP

47: DEFEBE0

48: DEFEBE1

49: PMU

50: SPI3

51: TZASC

52: PATA

53: VE

54: SS

55: EMAC

56: SATA

57: GPS

58: HDMI

59: TVE

60: ACE

61: TVD

62: PS2_0

63: PS2_1

64: USB3

65: USB4

66: PLE_PFM

67: TIMER4

68: TIMER5

69: GPU_GP

70: GPU_GPMMU

71: GPU_PP0

72: GPU_PPMMU0

73: GPU_PMU

74: GPU_RSV0

75: GPU_RSV1

76: GPU_RSV2

77: GPU_RSV3

78: GPU_RSV4

79: GPU_RSV5

80: GPU_RSV6

82: SYNC_TIMER0

83: SYNC_TIMER1

For the valid interrupt sources for your SoC, see the documentation in

sunxi/<soc>.txt



Example:

Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt

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Allwinner A10 (sun4i) interrupt sources

---------------------------------------



The interrupt sources available for the Allwinner A10 SoC are the

following one:



0: ENMI

1: UART0

2: UART1

3: UART2

4: UART3

5: IR0

6: IR1

7: I2C0

8: I2C1

9: I2C2

10: SPI0

11: SPI1

12: SPI2

13: SPDIF

14: AC97

15: TS

16: I2S

17: UART4

18: UART5

19: UART6

20: UART7

21: KEYPAD

22: TIMER0

23: TIMER1

24: TIMER2

25: TIMER3

26: CAN

27: DMA

28: PIO

29: TOUCH_PANEL

30: AUDIO_CODEC

31: LRADC

32: MMC0

33: MMC1

34: MMC2

35: MMC3

36: MEMSTICK

37: NAND

38: USB0

39: USB1

40: USB2

41: SCR

42: CSI0

43: CSI1

44: LCDCTRL0

45: LCDCTRL1

46: MP

47: DEFEBE0

48: DEFEBE1

49: PMU

50: SPI3

51: TZASC

52: PATA

53: VE

54: SS

55: EMAC

56: SATA

57: GPS

58: HDMI

59: TVE

60: ACE

61: TVD

62: PS2_0

63: PS2_1

64: USB3

65: USB4

66: PLE_PFM

67: TIMER4

68: TIMER5

69: GPU_GP

70: GPU_GPMMU

71: GPU_PP0

72: GPU_PPMMU0

73: GPU_PMU

74: GPU_RSV0

75: GPU_RSV1

76: GPU_RSV2

77: GPU_RSV3

78: GPU_RSV4

79: GPU_RSV5

80: GPU_RSV6

82: SYNC_TIMER0

83: SYNC_TIMER1

Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt

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Allwinner A13 (sun5i) interrupt sources

---------------------------------------



The interrupt sources available for the Allwinner A13 SoC are the

following one:



0: ENMI

2: UART1

4: UART3

5: IR

7: I2C0

8: I2C1

9: I2C2

10: SPI0

11: SPI1

12: SPI2

22: TIMER0

23: TIMER1

24: TIMER2

25: TIMER3

27: DMA

28: PIO

29: TOUCH_PANEL

30: AUDIO_CODEC

31: LRADC

32: MMC0

33: MMC1

34: MMC2

37: NAND

38: USB OTG

39: USB EHCI

40: USB OHCI

42: CSI

44: LCDCTRL

47: DEFEBE

49: PMU

53: VE

54: SS

66: PLE_PFM

67: TIMER4

68: TIMER5

69: GPU_GP

70: GPU_GPMMU

71: GPU_PP0

72: GPU_PPMMU0

73: GPU_PMU

74: GPU_RSV0

75: GPU_RSV1

76: GPU_RSV2

77: GPU_RSV3

78: GPU_RSV4

79: GPU_RSV5

80: GPU_RSV6

82: SYNC_TIMER0

83: SYNC_TIMER1

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