Commit d1615ca2 authored by Sinan Kaya's avatar Sinan Kaya Committed by Vinod Koul
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dmaengine: qcom_hidma: implement lower level hardware interface 



This patch implements the hardware hooks for the HIDMA channel driver.

The main functions of interest are:
- hidma_ll_init
- hidma_ll_request
- hidma_ll_queue_request
- hidma_ll_hw_start

OS layer calls the hidma_ll_init function during probe to set up the
hardware. At this moment, the number of supported descriptors are also
given. On each request, a descriptor is allocated from the free pool and
filled in with the transfer parameters. Multiple requests can be queued
into the hardware via the OS interface. When client is ready for requests
to be executed, start method is called.

Completions are delivered via callbacks via tasklet.

Signed-off-by: default avatarSinan Kaya <okaya@codeaurora.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 5ad3f29f

drivers/dma/qcom/Makefile

+2 −0
Original line number Diff line number Diff line 
obj-$(CONFIG_QCOM_BAM_DMA) += bam_dma.o

obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mgmt.o

hdma_mgmt-objs	 := hidma_mgmt.o hidma_mgmt_sys.o

obj-$(CONFIG_QCOM_HIDMA) +=  hdma.o

hdma-objs        := hidma_ll.o hidma.o

drivers/dma/qcom/hidma.c

+4 −4
Original line number Diff line number Diff line
@@ -404,7 +404,7 @@ static int hidma_terminate_channel(struct dma_chan *chan) 
	spin_unlock_irqrestore(&mchan->lock, irqflags);



	/* this suspends the existing transfer */

	rc = hidma_ll_pause(dmadev->lldev);

	rc = hidma_ll_disable(dmadev->lldev);

	if (rc) {

		dev_err(dmadev->ddev.dev, "channel did not pause\n");

		goto out;
@@ -427,7 +427,7 @@ static int hidma_terminate_channel(struct dma_chan *chan) 
		list_move(&mdesc->node, &mchan->free);

	}



	rc = hidma_ll_resume(dmadev->lldev);

	rc = hidma_ll_enable(dmadev->lldev);

out:

	pm_runtime_mark_last_busy(dmadev->ddev.dev);

	pm_runtime_put_autosuspend(dmadev->ddev.dev);
@@ -488,7 +488,7 @@ static int hidma_pause(struct dma_chan *chan) 
	dmadev = to_hidma_dev(mchan->chan.device);

	if (!mchan->paused) {

		pm_runtime_get_sync(dmadev->ddev.dev);

		if (hidma_ll_pause(dmadev->lldev))

		if (hidma_ll_disable(dmadev->lldev))

			dev_warn(dmadev->ddev.dev, "channel did not stop\n");

		mchan->paused = true;

		pm_runtime_mark_last_busy(dmadev->ddev.dev);
@@ -507,7 +507,7 @@ static int hidma_resume(struct dma_chan *chan) 
	dmadev = to_hidma_dev(mchan->chan.device);

	if (mchan->paused) {

		pm_runtime_get_sync(dmadev->ddev.dev);

		rc = hidma_ll_resume(dmadev->lldev);

		rc = hidma_ll_enable(dmadev->lldev);

		if (!rc)

			mchan->paused = false;

		else

drivers/dma/qcom/hidma.h

+17 −21
Original line number Diff line number Diff line 
/*

 * Qualcomm Technologies HIDMA data structures

 *

 * Copyright (c) 2014, The Linux Foundation. All rights reserved.

 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -20,32 +20,29 @@ 
#include <linux/interrupt.h>

#include <linux/dmaengine.h>



#define TRE_SIZE			32 /* each TRE is 32 bytes  */

#define TRE_CFG_IDX			0

#define TRE_LEN_IDX			1

#define TRE_SRC_LOW_IDX		2

#define TRE_SRC_HI_IDX			3

#define TRE_DEST_LOW_IDX		4

#define TRE_DEST_HI_IDX		5



struct hidma_tx_status {

	u8 err_info;			/* error record in this transfer    */

	u8 err_code;			/* completion code		    */

};

#define HIDMA_TRE_SIZE			32 /* each TRE is 32 bytes  */

#define HIDMA_TRE_CFG_IDX		0

#define HIDMA_TRE_LEN_IDX		1

#define HIDMA_TRE_SRC_LOW_IDX		2

#define HIDMA_TRE_SRC_HI_IDX		3

#define HIDMA_TRE_DEST_LOW_IDX		4

#define HIDMA_TRE_DEST_HI_IDX		5



struct hidma_tre {

	atomic_t allocated;		/* if this channel is allocated	    */

	bool queued;			/* flag whether this is pending     */

	u16 status;			/* status			    */

	u32 chidx;			/* index of the tre		    */

	u32 idx;			/* index of the tre		    */

	u32 dma_sig;			/* signature of the tre		    */

	const char *dev_name;		/* name of the device		    */

	void (*callback)(void *data);	/* requester callback		    */

	void *data;			/* Data associated with this channel*/

	struct hidma_lldev *lldev;	/* lldma device pointer		    */

	u32 tre_local[TRE_SIZE / sizeof(u32) + 1]; /* TRE local copy        */

	u32 tre_local[HIDMA_TRE_SIZE / sizeof(u32) + 1]; /* TRE local copy  */

	u32 tre_index;			/* the offset where this was written*/

	u32 int_flags;			/* interrupt flags		    */

	u8 err_info;			/* error record in this transfer    */

	u8 err_code;			/* completion code		    */

};



struct hidma_lldev {
@@ -61,22 +58,21 @@ struct hidma_lldev { 
	void __iomem *evca;		/* Event Channel address          */

	struct hidma_tre

		**pending_tre_list;	/* Pointers to pending TREs	  */

	struct hidma_tx_status

		*tx_status_list;	/* Pointers to pending TREs status*/

	s32 pending_tre_count;		/* Number of TREs pending	  */



	void *tre_ring;			/* TRE ring			  */

	dma_addr_t tre_ring_handle;	/* TRE ring to be shared with HW  */

	dma_addr_t tre_dma;		/* TRE ring to be shared with HW  */

	u32 tre_ring_size;		/* Byte size of the ring	  */

	u32 tre_processed_off;		/* last processed TRE		  */



	void *evre_ring;		/* EVRE ring			   */

	dma_addr_t evre_ring_handle;	/* EVRE ring to be shared with HW  */

	dma_addr_t evre_dma;		/* EVRE ring to be shared with HW  */

	u32 evre_ring_size;		/* Byte size of the ring	   */

	u32 evre_processed_off;		/* last processed EVRE		   */



	u32 tre_write_offset;           /* TRE write location              */

	struct tasklet_struct task;	/* task delivering notifications   */

	struct tasklet_struct rst_task;	/* task to reset HW                */

	DECLARE_KFIFO_PTR(handoff_fifo,

		struct hidma_tre *);    /* pending TREs FIFO               */

};
@@ -145,8 +141,8 @@ enum dma_status hidma_ll_status(struct hidma_lldev *llhndl, u32 tre_ch); 
bool hidma_ll_isenabled(struct hidma_lldev *llhndl);

void hidma_ll_queue_request(struct hidma_lldev *llhndl, u32 tre_ch);

void hidma_ll_start(struct hidma_lldev *llhndl);

int hidma_ll_pause(struct hidma_lldev *llhndl);

int hidma_ll_resume(struct hidma_lldev *llhndl);

int hidma_ll_disable(struct hidma_lldev *lldev);

int hidma_ll_enable(struct hidma_lldev *llhndl);

void hidma_ll_set_transfer_params(struct hidma_lldev *llhndl, u32 tre_ch,

	dma_addr_t src, dma_addr_t dest, u32 len, u32 flags);

int hidma_ll_setup(struct hidma_lldev *lldev);

drivers/dma/qcom/hidma_ll.c

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