Commit d10fb4a6 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Change pstate_clk frequency unit to 10KHz on Rv 



to keep consistent with other asics

Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4e418c34

drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

+2 −2
Original line number Diff line number Diff line
@@ -479,8 +479,8 @@ static int smu10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) 


	hwmgr->platform_descriptor.minimumClocksReductionPercentage = 50;



	hwmgr->pstate_sclk = SMU10_UMD_PSTATE_GFXCLK;

	hwmgr->pstate_mclk = SMU10_UMD_PSTATE_FCLK;

	hwmgr->pstate_sclk = SMU10_UMD_PSTATE_GFXCLK * 100;

	hwmgr->pstate_mclk = SMU10_UMD_PSTATE_FCLK * 100;



	return result;

}

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