i.MXC family: Adding timer support (d0f349fb) · Commits · 戴 / test

arch/arm/Kconfig

+2 −0

Original line number	Diff line number	Diff line
		@@ -367,6 +367,8 @@ config ARCH_NS9XXX

		config ARCH_MXC
		bool "Freescale MXC/iMX-based"
		select GENERIC_TIME
		select GENERIC_CLOCKEVENTS
		select ARCH_MTD_XIP
		select GENERIC_GPIO
		select HAVE_GPIO_LIB

arch/arm/mach-mx3/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -4,5 +4,5 @@

		# Object file lists.

		obj-y := mm.o time.o clock.o devices.o iomux.o
		obj-y := mm.o clock.o devices.o iomux.o
		obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o

arch/arm/mach-mx3/mx31ads.c

+12 −1

Original line number	Diff line number	Diff line
		@@ -26,6 +26,7 @@
		#include <asm/hardware.h>
		#include <asm/mach-types.h>
		#include <asm/mach/arch.h>
		#include <asm/mach/time.h>
		#include <asm/memory.h>
		#include <asm/mach/map.h>
		#include <asm/arch/common.h>
		@@ -127,6 +128,16 @@ static void __init mxc_board_init(void)
		mxc_init_extuart();
		}

		static void __init mx31ads_timer_init(void)
		{
		mxc_clocks_init(26000000);
		mxc_timer_init("ipg_clk.0");
		}

		struct sys_timer mx31ads_timer = {
		.init = mx31ads_timer_init,
		};

		/*
		* The following uses standard kernel macros defined in arch.h in order to
		* initialize __mach_desc_MX31ADS data structure.
		@@ -139,5 +150,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
		.map_io = mx31ads_map_io,
		.init_irq = mxc_init_irq,
		.init_machine = mxc_board_init,
		.timer = &mxc_timer,
		.timer = &mx31ads_timer,
		MACHINE_END

arch/arm/mach-mx3/time.c

deleted100644 → 0

+0 −148

Original line number	Diff line number	Diff line
		/*
		* System Timer Interrupt reconfigured to run in free-run mode.
		* Author: Vitaly Wool
		* Copyright 2004 MontaVista Software Inc.
		* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
		*/

		/*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*/

		/*!
		* @file time.c
		* @brief This file contains OS tick and wdog timer implementations.
		*
		* This file contains OS tick and wdog timer implementations.
		*
		* @ingroup Timers
		*/

		#include <linux/module.h>
		#include <linux/init.h>
		#include <linux/interrupt.h>
		#include <linux/irq.h>
		#include <asm/hardware.h>
		#include <asm/mach/time.h>
		#include <asm/io.h>
		#include <asm/arch/common.h>

		/*!
		* This is the timer interrupt service routine to do required tasks.
		* It also services the WDOG timer at the frequency of twice per WDOG
		* timeout value. For example, if the WDOG's timeout value is 4 (2
		* seconds since the WDOG runs at 0.5Hz), it will be serviced once
		* every 2/2=1 second.
		*
		* @param irq GPT interrupt source number (not used)
		* @param dev_id this parameter is not used
		* @return always returns \b IRQ_HANDLED as defined in
		* include/linux/interrupt.h.
		*/
		static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
		{
		unsigned int next_match;

		if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) {
		do {
		timer_tick();
		next_match = __raw_readl(MXC_GPT_GPTOCR1) + LATCH;
		__raw_writel(GPTSR_OF1, MXC_GPT_GPTSR);
		__raw_writel(next_match, MXC_GPT_GPTOCR1);
		} while ((signed long)(next_match -
		__raw_readl(MXC_GPT_GPTCNT)) <= 0);
		}

		return IRQ_HANDLED;
		}

		/*!
		* This function is used to obtain the number of microseconds since the last
		* timer interrupt. Note that interrupts is disabled by do_gettimeofday().
		*
		* @return the number of microseconds since the last timer interrupt.
		*/
		static unsigned long mxc_gettimeoffset(void)
		{
		unsigned long ticks_to_match, elapsed, usec, tick_usec, i;

		/* Get ticks before next timer match */
		ticks_to_match =
		__raw_readl(MXC_GPT_GPTOCR1) - __raw_readl(MXC_GPT_GPTCNT);

		/* We need elapsed ticks since last match */
		elapsed = LATCH - ticks_to_match;

		/* Now convert them to usec */
		/* Insure no overflow when calculating the usec below */
		for (i = 1, tick_usec = tick_nsec / 1000;; i *= 2) {
		tick_usec /= i;
		if ((0xFFFFFFFF / tick_usec) > elapsed)
		break;
		}
		usec = (unsigned long)(elapsed * tick_usec) / (LATCH / i);

		return usec;
		}

		/*!
		* The OS tick timer interrupt structure.
		*/
		static struct irqaction timer_irq = {
		.name = "MXC Timer Tick",
		.flags = IRQF_DISABLED \| IRQF_TIMER,
		.handler = mxc_timer_interrupt
		};

		/*!
		* This function is used to initialize the GPT to produce an interrupt
		* based on HZ. It is called by start_kernel() during system startup.
		*/
		void __init mxc_init_time(void)
		{
		u32 reg, v;
		reg = __raw_readl(MXC_GPT_GPTCR);
		reg &= ~GPTCR_ENABLE;
		__raw_writel(reg, MXC_GPT_GPTCR);
		reg \|= GPTCR_SWR;
		__raw_writel(reg, MXC_GPT_GPTCR);

		while ((__raw_readl(MXC_GPT_GPTCR) & GPTCR_SWR) != 0)
		cpu_relax();

		reg = GPTCR_FRR \| GPTCR_CLKSRC_HIGHFREQ;
		__raw_writel(reg, MXC_GPT_GPTCR);

		/* TODO: get timer rate from clk driver */
		v = 66500000;

		__raw_writel((v / CLOCK_TICK_RATE) - 1, MXC_GPT_GPTPR);

		if ((v % CLOCK_TICK_RATE) != 0) {
		pr_info("\nWARNING: Can't generate CLOCK_TICK_RATE at %d Hz\n",
		CLOCK_TICK_RATE);
		}
		pr_info("Actual CLOCK_TICK_RATE is %d Hz\n",
		v / ((__raw_readl(MXC_GPT_GPTPR) & 0xFFF) + 1));

		reg = __raw_readl(MXC_GPT_GPTCNT);
		reg += LATCH;
		__raw_writel(reg, MXC_GPT_GPTOCR1);

		setup_irq(MXC_INT_GPT, &timer_irq);

		reg = __raw_readl(MXC_GPT_GPTCR);
		reg =
		GPTCR_FRR \| GPTCR_CLKSRC_HIGHFREQ \| GPTCR_STOPEN \| GPTCR_DOZEN \|
		GPTCR_WAITEN \| GPTCR_ENMOD \| GPTCR_ENABLE;
		__raw_writel(reg, MXC_GPT_GPTCR);

		__raw_writel(GPTIR_OF1IE, MXC_GPT_GPTIR);
		}

		struct sys_timer mxc_timer = {
		.init = mxc_init_time,
		.offset = mxc_gettimeoffset,
		};

arch/arm/plat-mxc/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -3,4 +3,4 @@
		#

		# Common support
		obj-y := irq.o clock.o gpio.o
		obj-y := irq.o clock.o gpio.o time.o

Admin message