Commit d0be9f4e authored by Geliang Tang's avatar Geliang Tang Committed by Alex Deucher
Browse files

drm: fix trivial typos 



s/regsiter/register/

Signed-off-by: default avatarGeliang Tang <geliangtang@163.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f9fff064

drivers/gpu/drm/amd/include/atombios.h

+1 −1
Original line number Diff line number Diff line
@@ -6784,7 +6784,7 @@ typedef struct _ATOM_MC_INIT_PARAM_TABLE_V2_1 
  ULONG                         ulMCUcodeRomStartAddr;

  ULONG                         ulMCUcodeLength;

  USHORT                        usMcRegInitTableOffset;     // offset of ATOM_REG_INIT_SETTING array for MC core register settings.

  USHORT                        usReserved;                 // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY regsiter setting

  USHORT                        usReserved;                 // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY register setting

}ATOM_MC_INIT_PARAM_TABLE_V2_1;

drivers/gpu/drm/radeon/cayman_blit_shaders.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ 
 * evergreen cards need to use the 3D engine to blit data which requires

 * quite a bit of hw state setup.  Rather than pull the whole 3D driver

 * (which normally generates the 3D state) into the DRM, we opt to use

 * statically generated state tables.  The regsiter state and shaders

 * statically generated state tables.  The register state and shaders

 * were hand generated to support blitting functionality.  See the 3D

 * driver or documentation for descriptions of the registers and

 * shader instructions.

drivers/gpu/drm/radeon/evergreen_blit_shaders.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ 
 * evergreen cards need to use the 3D engine to blit data which requires

 * quite a bit of hw state setup.  Rather than pull the whole 3D driver

 * (which normally generates the 3D state) into the DRM, we opt to use

 * statically generated state tables.  The regsiter state and shaders

 * statically generated state tables.  The register state and shaders

 * were hand generated to support blitting functionality.  See the 3D

 * driver or documentation for descriptions of the registers and

 * shader instructions.

drivers/gpu/drm/radeon/r600_blit_shaders.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ 
 * R6xx+ cards need to use the 3D engine to blit data which requires

 * quite a bit of hw state setup.  Rather than pull the whole 3D driver

 * (which normally generates the 3D state) into the DRM, we opt to use

 * statically generated state tables.  The regsiter state and shaders

 * statically generated state tables.  The register state and shaders

 * were hand generated to support blitting functionality.  See the 3D

 * driver or documentation for descriptions of the registers and

 * shader instructions.

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