Commit d0bbbc4f authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915/skl: Implement WaDisablePowerCompilerClockGating 



Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 9505e01a

drivers/gpu/drm/i915/i915_reg.h

+3 −2
Original line number Diff line number Diff line
@@ -5258,6 +5258,7 @@ enum skl_disp_power_wells { 


#define HIZ_CHICKEN					0x7018

# define CHV_HZ_8X8_MODE_IN_1X				(1<<15)

# define BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE	(1<<3)



#define GEN9_SLICE_COMMON_ECO_CHICKEN0		0x7308

#define  DISABLE_PIXEL_MASK_CAMMING		(1<<14)

drivers/gpu/drm/i915/intel_ringbuffer.c

+8 −0
Original line number Diff line number Diff line
@@ -1004,8 +1004,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) 


static int skl_init_workarounds(struct intel_engine_cs *ring)

{

	struct drm_device *dev = ring->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;



	gen9_init_workarounds(ring);



	/* WaDisablePowerCompilerClockGating:skl */

	if (INTEL_REVID(dev) == SKL_REVID_B0)

		WA_SET_BIT_MASKED(HIZ_CHICKEN,

				  BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE);



	return 0;

}

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