Commit d09f85d5 authored by Yong Zhao's avatar Yong Zhao Committed by Alex Deucher
Browse files

drm/amdkfd: Use a systematic method to calculate queue mask bit 



The queue mask used for set_resources always assumes the queue number
per pipe is 8, so KFD needs to align with that by using function
amdgpu_queue_mask_bit_to_set_resource_bit().

Signed-off-by: default avatarYong Zhao <Yong.Zhao@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5c180eb9

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

+3 −0
Original line number Diff line number Diff line
@@ -149,6 +149,9 @@ int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev); 


void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);



int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,

					int queue_bit);



/* Shared API */

int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,

				void **mem_obj, uint64_t *gpu_addr,

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+3 −1
Original line number Diff line number Diff line
@@ -1089,7 +1089,9 @@ static int set_sched_resources(struct device_queue_manager *dqm) 
			break;

		}



		res.queue_mask |= (1ull << i);

		res.queue_mask |= 1ull

			<< amdgpu_queue_mask_bit_to_set_resource_bit(

				(struct amdgpu_device *)dqm->dev->kgd, i);

	}

	res.gws_mask = ~0ull;

	res.oac_mask = res.gds_heap_base = res.gds_heap_size = 0;

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