Commit d09cc365 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'irq-core-for-linus' of... 

Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into next

Pull core irq updates from Thomas Gleixner:
 "The irq department delivers:

   - Another tree wide update to get rid of the horrible create_irq
     interface along with its even more horrible variants.  That also
     gets rid of the last leftovers of the initial sparse irq hackery.
     arch/driver specific changes have been either acked or ignored.

   - A fix for the spurious interrupt detection logic with threaded
     interrupts.

   - A new ARM SoC interrupt controller

   - The usual pile of fixes and improvements all over the place"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (40 commits)
  Documentation: brcmstb-l2: Add Broadcom STB Level-2 interrupt controller binding
  irqchip: brcmstb-l2: Add Broadcom Set Top Box Level-2 interrupt controller
  genirq: Improve documentation to match current implementation
  ARM: iop13xx: fix msi support with sparse IRQ
  genirq: Provide !SMP stub for irq_set_affinity_notifier()
  irqchip: armada-370-xp: Move the devicetree binding documentation
  irqchip: gic: Use mask field in GICC_IAR
  genirq: Remove dynamic_irq mess
  ia64: Use irq_init_desc
  genirq: Replace dynamic_irq_init/cleanup
  genirq: Remove irq_reserve_irq[s]
  genirq: Replace reserve_irqs in core code
  s390: Avoid call to irq_reserve_irqs()
  s390: Remove pointless arch_show_interrupts()
  s390: pci: Check return value of alloc_irq_desc() proper
  sh: intc: Remove pointless irq_reserve_irqs() invocation
  x86, irq: Remove pointless irq_reserve_irqs() call
  genirq: Make create/destroy_irq() ia64 private
  tile: Use SPARSE_IRQ
  tile: pci: Use irq_alloc/free_hwirq()
  ...
parents 82e627eb c0ffa793

Documentation/IRQ-domain.txt

+1 −2
Original line number Diff line number Diff line
@@ -41,8 +41,7 @@ An interrupt controller driver creates and registers an irq_domain by 
calling one of the irq_domain_add_*() functions (each mapping method

has a different allocator function, more on that later).  The function

will return a pointer to the irq_domain on success.  The caller must

provide the allocator function with an irq_domain_ops structure with

the .map callback populated as a minimum.

provide the allocator function with an irq_domain_ops structure.



In most cases, the irq_domain will begin empty without any mappings

between hwirq and IRQ numbers.  Mappings are added to the irq_domain

Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt

0 → 100644
+29 −0
Original line number Diff line number Diff line 
Broadcom Generic Level 2 Interrupt Controller



Required properties:



- compatible: should be "brcm,l2-intc"

- reg: specifies the base physical address and size of the registers

- interrupt-controller: identifies the node as an interrupt controller

- #interrupt-cells: specifies the number of cells needed to encode an

  interrupt source. Should be 1.

- interrupt-parent: specifies the phandle to the parent interrupt controller

  this controller is cacaded from

- interrupts: specifies the interrupt line in the interrupt-parent irq space

  to be used for cascading



Optional properties:



- brcm,irq-can-wake: If present, this means the L2 controller can be used as a

  wakeup source for system suspend/resume.



Example:



hif_intr2_intc: interrupt-controller@f0441000 {

	compatible = "brcm,l2-intc";

	reg = <0xf0441000 0x30>;

	interrupt-controller;

	#interrupt-cells = <1>;

	interrupt-parent = <&intc>;

	interrupts = <0x0 0x20 0x0>;

};

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -480,6 +480,7 @@ config ARCH_IOP13XX 
	select PCI

	select PLAT_IOP

	select VMSPLIT_1G

	select SPARSE_IRQ

	help

	  Support for Intel's IOP13XX (XScale) family of processors.

arch/arm/mach-iop13xx/include/mach/irqs.h

+0 −2
Original line number Diff line number Diff line
@@ -191,6 +191,4 @@ static inline u32 read_intpnd_3(void) 
#define NR_IOP13XX_IRQS	(IRQ_IOP13XX_HPI + 1)

#endif



#define NR_IRQS		NR_IOP13XX_IRQS



#endif /* _IOP13XX_IRQ_H_ */

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