Commit d07f14be authored by Roger He's avatar Roger He Committed by Alex Deucher
Browse files

drm/amd/amdgpu: expose fragment size as module parameter (v2) 



Allow overrides on the command line.

v2: agd: sqaush in spelling fix and bogus default value warning

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarRoger He <Hongbo.He@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e618d306

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -96,6 +96,7 @@ extern int amdgpu_bapm; 
extern int amdgpu_deep_color;

extern int amdgpu_vm_size;

extern int amdgpu_vm_block_size;

extern int amdgpu_vm_fragment_size;

extern int amdgpu_vm_fault_stop;

extern int amdgpu_vm_debug;

extern int amdgpu_vm_update_mode;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+7 −0
Original line number Diff line number Diff line
@@ -1076,6 +1076,13 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev) 
		amdgpu_gtt_size = -1;

	}



	/* valid range is between 4 and 9 inclusive */

	if (amdgpu_vm_fragment_size != -1 &&

	    (amdgpu_vm_fragment_size > 9 || amdgpu_vm_fragment_size < 4)) {

		dev_warn(adev->dev, "valid range is between 4 and 9\n");

		amdgpu_vm_fragment_size = -1;

	}



	amdgpu_check_vm_size(adev);



	amdgpu_check_block_size(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+4 −0
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@ unsigned amdgpu_ip_block_mask = 0xffffffff; 
int amdgpu_bapm = -1;

int amdgpu_deep_color = 0;

int amdgpu_vm_size = -1;

int amdgpu_vm_fragment_size = -1;

int amdgpu_vm_block_size = -1;

int amdgpu_vm_fault_stop = 0;

int amdgpu_vm_debug = 0;
@@ -183,6 +184,9 @@ module_param_named(deep_color, amdgpu_deep_color, int, 0444); 
MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 64GB)");

module_param_named(vm_size, amdgpu_vm_size, int, 0444);



MODULE_PARM_DESC(vm_fragment_size, "VM fragment size in bits (4, 5, etc. 4 = 64K (default), Max 9 = 2M)");

module_param_named(vm_fragment_size, amdgpu_vm_fragment_size, int, 0444);



MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");

module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+21 −4
Original line number Diff line number Diff line
@@ -2413,12 +2413,26 @@ static uint32_t amdgpu_vm_get_block_size(uint64_t vm_size) 
}



/**

 * amdgpu_vm_adjust_size - adjust vm size and block size

 * amdgpu_vm_set_fragment_size - adjust fragment size in PTE

 *

 * @adev: amdgpu_device pointer

 * @fragment_size_default: the default fragment size if it's set auto

 */

void amdgpu_vm_set_fragment_size(struct amdgpu_device *adev, uint32_t fragment_size_default)

{

	if (amdgpu_vm_fragment_size == -1)

		adev->vm_manager.fragment_size = fragment_size_default;

	else

		adev->vm_manager.fragment_size = amdgpu_vm_fragment_size;

}



/**

 * amdgpu_vm_adjust_size - adjust vm size, block size and fragment size

 *

 * @adev: amdgpu_device pointer

 * @vm_size: the default vm size if it's set auto

 */

void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint64_t vm_size)

void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint64_t vm_size, uint32_t fragment_size_default)

{

	/* adjust vm size firstly */

	if (amdgpu_vm_size == -1)
@@ -2433,8 +2447,11 @@ void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint64_t vm_size) 
	else

		adev->vm_manager.block_size = amdgpu_vm_block_size;



	DRM_INFO("vm size is %llu GB, block size is %u-bit\n",

		adev->vm_manager.vm_size, adev->vm_manager.block_size);

	amdgpu_vm_set_fragment_size(adev, fragment_size_default);



	DRM_INFO("vm size is %llu GB, block size is %u-bit, fragment size is %u-bit\n",

		adev->vm_manager.vm_size, adev->vm_manager.block_size,

		adev->vm_manager.fragment_size);

}



/**

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

+4 −1
Original line number Diff line number Diff line
@@ -271,7 +271,10 @@ int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev, 
				uint64_t saddr, uint64_t size);

void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,

		      struct amdgpu_bo_va *bo_va);

void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint64_t vm_size);

void amdgpu_vm_set_fragment_size(struct amdgpu_device *adev,

				uint32_t fragment_size_default);

void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint64_t vm_size,

				uint32_t fragment_size_default);

int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);

bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring,

				  struct amdgpu_job *job);

CRA Git | Maintained and supported by SUSTech CRA and CCSE