Unverified Commit d0275214 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
Browse files

ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by address 



The NAND controller device node was inserted into the wrong position,
probably due to a rebase or merge, as the file's structure does not
provide enough context for git to accurately match the previous device
node block.

Fixes: d7b843df ("ARM: dts: sun8i: add NAND controller node for A23/A33")
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent 5949bc56

arch/arm/boot/dts/sun8i-a23-a33.dtsi

+13 −15
Original line number Diff line number Diff line
@@ -155,6 +155,19 @@ 
			#dma-cells = <1>;

		};



		nfc: nand@1c03000 {

			compatible = "allwinner,sun4i-a10-nand";

			reg = <0x01c03000 0x1000>;

			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;

			clock-names = "ahb", "mod";

			resets = <&ccu RST_BUS_NAND>;

			reset-names = "ahb";

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;

		};



		mmc0: mmc@1c0f000 {

			compatible = "allwinner,sun7i-a20-mmc";

			reg = <0x01c0f000 0x1000>;
@@ -214,21 +227,6 @@ 
			#size-cells = <0>;

		};



		nfc: nand@1c03000 {

			compatible = "allwinner,sun4i-a10-nand";

			reg = <0x01c03000 0x1000>;

			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;

			clock-names = "ahb", "mod";

			resets = <&ccu RST_BUS_NAND>;

			reset-names = "ahb";

			pinctrl-names = "default";

			pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;

		};



		usb_otg: usb@1c19000 {

			/* compatible gets set in SoC specific dtsi file */

			reg = <0x01c19000 0x0400>;

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