MIPS: of/pci: Use of_pci_range_parser

#ifdef CONFIG_OF

void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node)

{

	const __be32 *ranges;

	int rlen;

	int pna = of_n_addr_cells(node);

	int np = pna + 5;

	struct of_pci_range range;

	struct of_pci_range_parser parser;

	pr_info("PCI host bridge %s ranges:\n", node->full_name);

	ranges = of_get_property(node, "ranges", &rlen);

	if (ranges == NULL)

		return;

	hose->of_node = node;

	while ((rlen -= np * 4) >= 0) {

		u32 pci_space;

	if (of_pci_range_parser_init(&parser, node))

		return;

	for_each_of_pci_range(&parser, &range) {

		struct resource *res = NULL;

		u64 addr, size;

		pci_space = be32_to_cpup(&ranges[0]);

		addr = of_translate_address(node, ranges + 3);

		size = of_read_number(ranges + pna + 3, 2);

		ranges += np;

		switch ((pci_space >> 24) & 0x3) {

		case 1:		/* PCI IO space */

		switch (range.flags & IORESOURCE_TYPE_BITS) {

		case IORESOURCE_IO:

			pr_info("  IO 0x%016llx..0x%016llx\n",

					addr, addr + size - 1);

				range.cpu_addr,

				range.cpu_addr + range.size - 1);

			hose->io_map_base =

				(unsigned long)ioremap(addr, size);

				(unsigned long)ioremap(range.cpu_addr,

						       range.size);

			res = hose->io_resource;

			res->flags = IORESOURCE_IO;

			break;

		case 2:		/* PCI Memory space */

		case 3:		/* PCI 64 bits Memory space */

		case IORESOURCE_MEM:

			pr_info(" MEM 0x%016llx..0x%016llx\n",

					addr, addr + size - 1);

				range.cpu_addr,

				range.cpu_addr + range.size - 1);

			res = hose->mem_resource;

			res->flags = IORESOURCE_MEM;

			break;

		}

		if (res != NULL) {

			res->start = addr;

			res->name = node->full_name;

			res->end = res->start + size - 1;

			res->parent = NULL;

			res->sibling = NULL;

			res->child = NULL;

		}

		if (res != NULL)

			of_pci_range_to_resource(&range, node, res);

	}

}