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This converts the Cadence SPI master driver to use GPIO descriptors for chip select handling. The Cadence driver was allocating a state container just to hold the requested GPIO line and contained lots of polarity inversion code. As this is all handled by gpiolib and a simple devm_* request in the core, and as the driver is fully device tree only, most of this code chunk goes away in favour of central handling. The setup/cleanup callbacks goes away. This driver does NOT drive the CS line by setting the value of the GPIO so it relies on the SPI core to do this, which should work just fine with the descriptors. Cc: Wei Yongjun <weiyongjun1@huawei.com> Cc: Janek Kotas <jank@cadence.com> Cc: Linuxarm <linuxarm@huawei.com> Signed-off-by:Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Mark Brown <broonie@kernel.org>
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