habanalabs: use PI in MMU cache invalidation (cfd4176d) · Commits · 戴 / test

drivers/misc/habanalabs/gaudi/gaudi.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -2725,6 +2725,12 @@ static int gaudi_mmu_init(struct hl_device *hdev)
		WREG32(mmSTLB_HOP_CONFIGURATION,
		hdev->mmu_huge_page_opt ? 0x30440 : 0x40440);

		/*
		* The H/W expects the first PI after init to be 1. After wraparound
		* we'll write 0.
		*/
		gaudi->mmu_cache_inv_pi = 1;

		gaudi->hw_cap_initialized \|= HW_CAP_MMU;

		return 0;
		@@ -6017,6 +6023,8 @@ static int gaudi_mmu_invalidate_cache(struct hl_device *hdev, bool is_hard,
		mutex_lock(&hdev->mmu_cache_lock);

		/* L0 & L1 invalidation */
		WREG32(mmSTLB_INV_PS, 3);
		WREG32(mmSTLB_CACHE_INV, gaudi->mmu_cache_inv_pi++);
		WREG32(mmSTLB_INV_PS, 2);

		rc = hl_poll_timeout(

+3 −0

Original line number	Diff line number	Diff line
		@@ -229,6 +229,8 @@ struct gaudi_internal_qman_info {
		* @multi_msi_mode: whether we are working in multi MSI single MSI mode.
		* Multi MSI is possible only with IOMMU enabled.
		* @ext_queue_idx: helper index for external queues initialization.
		* @mmu_cache_inv_pi: PI for MMU cache invalidation flow. The H/W expects an
		* 8-bit value so use u8.
		*/
		struct gaudi_device {
		int (armcp_info_get)(struct hl_device hdev);
		@@ -248,6 +250,7 @@ struct gaudi_device {
		u32 hw_cap_initialized;
		u8 multi_msi_mode;
		u8 ext_queue_idx;
		u8 mmu_cache_inv_pi;
		};

		void gaudi_init_security(struct hl_device *hdev);