Commit cf8ae446 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: Fix IOMMU device node names 



Fix IOMMU device node names as "iommu@".

Fixes: 8f507bab ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes")
Fixes: 63093a8e ("arm64: dts: renesas: r8a774b1: Add IPMMU device nodes")
Fixes: 6c7e0217 ("arm64: dts: renesas: r8a774c0: Add IPMMU device nodes")
Fixes: 3b7e7848 ("arm64: dts: renesas: r8a7795: Add IPMMU device nodes")
Fixes: e4b9a493 ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes")
Fixes: 389baa40 ("arm64: dts: renesas: r8a7796: Add IPMMU device nodes")
Fixes: 55697cbb ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes")
Fixes: ce3b52a1 ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes")
Fixes: a3901e73 ("arm64: dts: renesas: r8a77995: Add IPMMU device nodes")
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1587461775-13369-1-git-send-email-yoshihiro.shimoda.uh@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent ae990a1d

arch/arm64/boot/dts/renesas/r8a774a1.dtsi

+9 −9
Original line number Diff line number Diff line
@@ -1000,7 +1000,7 @@ 
			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;

		};



		ipmmu_ds0: mmu@e6740000 {

		ipmmu_ds0: iommu@e6740000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xe6740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 0>;
@@ -1008,7 +1008,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_ds1: mmu@e7740000 {

		ipmmu_ds1: iommu@e7740000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xe7740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 1>;
@@ -1016,7 +1016,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_hc: mmu@e6570000 {

		ipmmu_hc: iommu@e6570000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xe6570000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 2>;
@@ -1024,7 +1024,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mm: mmu@e67b0000 {

		ipmmu_mm: iommu@e67b0000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xe67b0000 0 0x1000>;

			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@@ -1033,7 +1033,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mp: mmu@ec670000 {

		ipmmu_mp: iommu@ec670000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xec670000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 4>;
@@ -1041,7 +1041,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv0: mmu@fd800000 {

		ipmmu_pv0: iommu@fd800000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xfd800000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 5>;
@@ -1049,7 +1049,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv1: mmu@fd950000 {

		ipmmu_pv1: iommu@fd950000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xfd950000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 6>;
@@ -1057,7 +1057,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vc0: mmu@fe6b0000 {

		ipmmu_vc0: iommu@fe6b0000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xfe6b0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 8>;
@@ -1065,7 +1065,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vi0: mmu@febd0000 {

		ipmmu_vi0: iommu@febd0000 {

			compatible = "renesas,ipmmu-r8a774a1";

			reg = <0 0xfebd0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 9>;

arch/arm64/boot/dts/renesas/r8a774b1.dtsi

+9 −9
Original line number Diff line number Diff line
@@ -874,7 +874,7 @@ 
			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;

		};



		ipmmu_ds0: mmu@e6740000 {

		ipmmu_ds0: iommu@e6740000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xe6740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 0>;
@@ -882,7 +882,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_ds1: mmu@e7740000 {

		ipmmu_ds1: iommu@e7740000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xe7740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 1>;
@@ -890,7 +890,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_hc: mmu@e6570000 {

		ipmmu_hc: iommu@e6570000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xe6570000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 2>;
@@ -898,7 +898,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mm: mmu@e67b0000 {

		ipmmu_mm: iommu@e67b0000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xe67b0000 0 0x1000>;

			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@@ -907,7 +907,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mp: mmu@ec670000 {

		ipmmu_mp: iommu@ec670000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xec670000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 4>;
@@ -915,7 +915,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv0: mmu@fd800000 {

		ipmmu_pv0: iommu@fd800000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xfd800000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 6>;
@@ -923,7 +923,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vc0: mmu@fe6b0000 {

		ipmmu_vc0: iommu@fe6b0000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xfe6b0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 12>;
@@ -931,7 +931,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vi0: mmu@febd0000 {

		ipmmu_vi0: iommu@febd0000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xfebd0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 14>;
@@ -939,7 +939,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vp0: mmu@fe990000 {

		ipmmu_vp0: iommu@fe990000 {

			compatible = "renesas,ipmmu-r8a774b1";

			reg = <0 0xfe990000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 16>;

arch/arm64/boot/dts/renesas/r8a774c0.dtsi

+9 −9
Original line number Diff line number Diff line
@@ -847,7 +847,7 @@ 
			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;

		};



		ipmmu_ds0: mmu@e6740000 {

		ipmmu_ds0: iommu@e6740000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xe6740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 0>;
@@ -855,7 +855,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_ds1: mmu@e7740000 {

		ipmmu_ds1: iommu@e7740000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xe7740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 1>;
@@ -863,7 +863,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_hc: mmu@e6570000 {

		ipmmu_hc: iommu@e6570000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xe6570000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 2>;
@@ -871,7 +871,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mm: mmu@e67b0000 {

		ipmmu_mm: iommu@e67b0000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xe67b0000 0 0x1000>;

			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@@ -880,7 +880,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mp: mmu@ec670000 {

		ipmmu_mp: iommu@ec670000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xec670000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 4>;
@@ -888,7 +888,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv0: mmu@fd800000 {

		ipmmu_pv0: iommu@fd800000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xfd800000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 6>;
@@ -896,7 +896,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vc0: mmu@fe6b0000 {

		ipmmu_vc0: iommu@fe6b0000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xfe6b0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 12>;
@@ -904,7 +904,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vi0: mmu@febd0000 {

		ipmmu_vi0: iommu@febd0000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xfebd0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 14>;
@@ -912,7 +912,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vp0: mmu@fe990000 {

		ipmmu_vp0: iommu@fe990000 {

			compatible = "renesas,ipmmu-r8a774c0";

			reg = <0 0xfe990000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 16>;

arch/arm64/boot/dts/renesas/r8a77950.dtsi

+7 −7
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ 
	/delete-node/ dma-controller@e6460000;

	/delete-node/ dma-controller@e6470000;



	ipmmu_mp1: mmu@ec680000 {

	ipmmu_mp1: iommu@ec680000 {

		compatible = "renesas,ipmmu-r8a7795";

		reg = <0 0xec680000 0 0x1000>;

		renesas,ipmmu-main = <&ipmmu_mm 5>;
@@ -85,7 +85,7 @@ 
		#iommu-cells = <1>;

	};



	ipmmu_sy: mmu@e7730000 {

	ipmmu_sy: iommu@e7730000 {

		compatible = "renesas,ipmmu-r8a7795";

		reg = <0 0xe7730000 0 0x1000>;

		renesas,ipmmu-main = <&ipmmu_mm 8>;
@@ -93,11 +93,11 @@ 
		#iommu-cells = <1>;

	};



	/delete-node/ mmu@fd950000;

	/delete-node/ mmu@fd960000;

	/delete-node/ mmu@fd970000;

	/delete-node/ mmu@febe0000;

	/delete-node/ mmu@fe980000;

	/delete-node/ iommu@fd950000;

	/delete-node/ iommu@fd960000;

	/delete-node/ iommu@fd970000;

	/delete-node/ iommu@febe0000;

	/delete-node/ iommu@fe980000;



	xhci1: usb@ee040000 {

		compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";

arch/arm64/boot/dts/renesas/r8a77951.dtsi

+17 −17
Original line number Diff line number Diff line
@@ -1073,7 +1073,7 @@ 
			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;

		};



		ipmmu_ds0: mmu@e6740000 {

		ipmmu_ds0: iommu@e6740000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xe6740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 0>;
@@ -1081,7 +1081,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_ds1: mmu@e7740000 {

		ipmmu_ds1: iommu@e7740000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xe7740000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 1>;
@@ -1089,7 +1089,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_hc: mmu@e6570000 {

		ipmmu_hc: iommu@e6570000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xe6570000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 2>;
@@ -1097,7 +1097,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_ir: mmu@ff8b0000 {

		ipmmu_ir: iommu@ff8b0000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xff8b0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 3>;
@@ -1105,7 +1105,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mm: mmu@e67b0000 {

		ipmmu_mm: iommu@e67b0000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xe67b0000 0 0x1000>;

			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@@ -1114,7 +1114,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_mp0: mmu@ec670000 {

		ipmmu_mp0: iommu@ec670000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xec670000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 4>;
@@ -1122,7 +1122,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv0: mmu@fd800000 {

		ipmmu_pv0: iommu@fd800000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfd800000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 6>;
@@ -1130,7 +1130,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv1: mmu@fd950000 {

		ipmmu_pv1: iommu@fd950000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfd950000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 7>;
@@ -1138,7 +1138,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv2: mmu@fd960000 {

		ipmmu_pv2: iommu@fd960000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfd960000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 8>;
@@ -1146,7 +1146,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_pv3: mmu@fd970000 {

		ipmmu_pv3: iommu@fd970000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfd970000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 9>;
@@ -1154,7 +1154,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_rt: mmu@ffc80000 {

		ipmmu_rt: iommu@ffc80000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xffc80000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 10>;
@@ -1162,7 +1162,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vc0: mmu@fe6b0000 {

		ipmmu_vc0: iommu@fe6b0000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfe6b0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 12>;
@@ -1170,7 +1170,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vc1: mmu@fe6f0000 {

		ipmmu_vc1: iommu@fe6f0000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfe6f0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 13>;
@@ -1178,7 +1178,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vi0: mmu@febd0000 {

		ipmmu_vi0: iommu@febd0000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfebd0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 14>;
@@ -1186,7 +1186,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vi1: mmu@febe0000 {

		ipmmu_vi1: iommu@febe0000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfebe0000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 15>;
@@ -1194,7 +1194,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vp0: mmu@fe990000 {

		ipmmu_vp0: iommu@fe990000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfe990000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 16>;
@@ -1202,7 +1202,7 @@ 
			#iommu-cells = <1>;

		};



		ipmmu_vp1: mmu@fe980000 {

		ipmmu_vp1: iommu@fe980000 {

			compatible = "renesas,ipmmu-r8a7795";

			reg = <0 0xfe980000 0 0x1000>;

			renesas,ipmmu-main = <&ipmmu_mm 17>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE