Commit cf7ad043 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: allow alignment fault mode to be configured at kernel boot
  ARM: Update mach-types
  ARM: 5951/1: ARM: fix documentation of the PrimeCell bus
  ARM: 5950/1: ARM: Fix build error for arm1026ej-s processor
  MAINTAINERS: fix my e-mail and status for Gemini and FA526
  Gemini: wrong registers used to set reg_level in gpio_set_irq_type()
  ARM: 5944/1: scsi: fix timer setup in fas216.c
  ARM: 5938/1: ARM: L2: export outer_cache_fns
parents 4ec62b2b d944d549

Documentation/kernel-parameters.txt

+5 −0
Original line number Diff line number Diff line
@@ -315,6 +315,11 @@ and is between 256 and 4096 characters. It is defined in the file 
	aic79xx=	[HW,SCSI]

			See Documentation/scsi/aic79xx.txt.



	alignment=	[KNL,ARM]

			Allow the default userspace alignment fault handler

			behaviour to be specified.  Bit 0 enables warnings,

			bit 1 enables fixups, and bit 2 sends a segfault.



	amd_iommu=	[HW,X86-84]

			Pass parameters to the AMD IOMMU driver in the system.

			Possible values are:

MAINTAINERS

+4 −4
Original line number Diff line number Diff line
@@ -616,10 +616,10 @@ M: Richard Purdie <rpurdie@rpsys.net> 
S:	Maintained



ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE

M:	Paulius Zaleckas <paulius.zaleckas@teltonika.lt>

M:	Paulius Zaleckas <paulius.zaleckas@gmail.com>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

T:	git git://gitorious.org/linux-gemini/mainline.git

S:	Maintained

S:	Odd Fixes

F:	arch/arm/mach-gemini/



ARM/EBSA110 MACHINE SUPPORT
@@ -641,9 +641,9 @@ T: topgit git://git.openezx.org/openezx.git 
F:	arch/arm/mach-pxa/ezx.c



ARM/FARADAY FA526 PORT

M:	Paulius Zaleckas <paulius.zaleckas@teltonika.lt>

M:	Paulius Zaleckas <paulius.zaleckas@gmail.com>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

S:	Maintained

S:	Odd Fixes

F:	arch/arm/mm/*-fa*



ARM/FOOTBRIDGE ARCHITECTURE

arch/arm/include/asm/cacheflush.h

+2 −1
Original line number Diff line number Diff line
@@ -42,7 +42,8 @@ 
#endif



#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \

    defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020)

    defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \

    defined(CONFIG_CPU_ARM1026)

# define MULTI_CACHE 1

#endif

arch/arm/kernel/setup.c

+1 −0
Original line number Diff line number Diff line
@@ -102,6 +102,7 @@ struct cpu_cache_fns cpu_cache; 
#endif

#ifdef CONFIG_OUTER_CACHE

struct outer_cache_fns outer_cache;

EXPORT_SYMBOL(outer_cache);

#endif



struct stack {

arch/arm/mach-gemini/gpio.c

+2 −2
Original line number Diff line number Diff line
@@ -86,7 +86,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type) 
	unsigned int reg_both, reg_level, reg_type;



	reg_type = __raw_readl(base + GPIO_INT_TYPE);

	reg_level = __raw_readl(base + GPIO_INT_BOTH_EDGE);

	reg_level = __raw_readl(base + GPIO_INT_LEVEL);

	reg_both = __raw_readl(base + GPIO_INT_BOTH_EDGE);



	switch (type) {
@@ -117,7 +117,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type) 
	}



	__raw_writel(reg_type, base + GPIO_INT_TYPE);

	__raw_writel(reg_level, base + GPIO_INT_BOTH_EDGE);

	__raw_writel(reg_level, base + GPIO_INT_LEVEL);

	__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);



	gpio_ack_irq(irq);

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