Commit cf4aae1a authored by Andrew Jeffery's avatar Andrew Jeffery Committed by Joel Stanley
Browse files

ARM: dts: aspeed-g5: Sort LPC child nodes by unit address 



Lets try to maintain some sort of sanity.

Signed-off-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent e3f0cf4f

arch/arm/boot/dts/aspeed-g5.dtsi

+6 −5
Original line number Diff line number Diff line
@@ -474,17 +474,18 @@ 
						status = "disabled";

					};



					lhc: lhc@20 {

						compatible = "aspeed,ast2500-lhc";

						reg = <0x20 0x24 0x48 0x8>;

					};



					lpc_reset: reset-controller@18 {

						compatible = "aspeed,ast2500-lpc-reset";

						reg = <0x18 0x4>;

						#reset-cells = <1>;

					};



					lhc: lhc@20 {

						compatible = "aspeed,ast2500-lhc";

						reg = <0x20 0x24 0x48 0x8>;

					};





					ibt: ibt@c0 {

						compatible = "aspeed,ast2500-ibt-bmc";

						reg = <0xc0 0x18>;

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