Commit cf3d262e authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Fix comments about CHV snoop behaviour 



Replace the misinformed notes about CHV snoop behaviour with something
that's hopefully closer to reality.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c2b66797

drivers/gpu/drm/i915/i915_gem_gtt.c

+11 −3
Original line number Diff line number Diff line
@@ -1942,9 +1942,17 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv) 
	 * Only the snoop bit has meaning for CHV, the rest is

	 * ignored.

	 *

	 * Note that the harware enforces snooping for all page

	 * table accesses. The snoop bit is actually ignored for

	 * PDEs.

	 * The hardware will never snoop for certain types of accesses:

	 * - CPU GTT (GMADR->GGTT->no snoop->memory)

	 * - PPGTT page tables

	 * - some other special cycles

	 *

	 * As with BDW, we also need to consider the following for GT accesses:

	 * "For GGTT, there is NO pat_sel[2:0] from the entry,

	 * so RTL will always use the value corresponding to

	 * pat_sel = 000".

	 * Which means we must set the snoop bit in PAT entry 0

	 * in order to keep the global status page working.

	 */

	pat = GEN8_PPAT(0, CHV_PPAT_SNOOP) |

	      GEN8_PPAT(1, 0) |

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