Commit ced3ec8a authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz
Browse files

ide: prefix messages from IDE PCI host drivers by driver name 



Prefix messages from IDE PCI host drivers by driver name instead of marketed
chipset name (it is still possible to exactly identify the particular chipset
basing on driver messages).

As a bonus this provides nice code savings for some drivers:

   text    data     bss     dec     hex filename
   3826     112       8    3946     f6a drivers/ide/pci/amd74xx.o.before
   2786     112       8    2906     b5a drivers/ide/pci/amd74xx.o.after
    764     108       0     872     368 drivers/ide/pci/cs5520.o.before
    680     108       0     788     314 drivers/ide/pci/cs5520.o.after
   1680     112       4    1796     704 drivers/ide/pci/generic.o.before
   1155     112       4    1271     4f7 drivers/ide/pci/generic.o.after
   7128     792       0    7920    1ef0 drivers/ide/pci/hpt366.o.before
   6984     792       0    7776    1e60 drivers/ide/pci/hpt366.o.after
   2800     148       0    2948     b84 drivers/ide/pci/pdc202xx_new.o.before
   2523     148       0    2671     a6f drivers/ide/pci/pdc202xx_new.o.after
   2831     148       0    2979     ba3 drivers/ide/pci/pdc202xx_old.o.before
   2683     148       0    2831     b0f drivers/ide/pci/pdc202xx_old.o.after
   3776     112       4    3892     f34 drivers/ide/pci/piix.o.before
   2804     112       4    2920     b68 drivers/ide/pci/piix.o.after
   4693     116       0    4809    12c9 drivers/ide/pci/siimage.o.before
   4600     116       0    4716    126c drivers/ide/pci/siimage.o.after

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent 04ba6e73

drivers/ide/pci/aec62xx.c

+18 −11
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@ 


#include <asm/io.h>



#define DRV_NAME "aec62xx"



struct chipset_bus_clock_list_entry {

	u8 xfer_speed;

	u8 chipset_settings;
@@ -180,8 +182,8 @@ static const struct ide_port_ops atp86x_port_ops = { 
};



static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {

	{	/* 0 */

		.name		= "AEC6210",

	{	/* 0: AEC6210 */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_aec62xx,

		.enablebits	= {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},

		.port_ops	= &atp850_port_ops,
@@ -192,8 +194,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { 
		.pio_mask	= ATA_PIO4,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= ATA_UDMA2,

	},{	/* 1 */

		.name		= "AEC6260",

	},

	{	/* 1: AEC6260 */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_aec62xx,

		.port_ops	= &atp86x_port_ops,

		.host_flags	= IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA |
@@ -201,8 +204,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { 
		.pio_mask	= ATA_PIO4,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= ATA_UDMA4,

	},{	/* 2 */

		.name		= "AEC6260R",

	},

	{	/* 2: AEC6260R */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_aec62xx,

		.enablebits	= {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},

		.port_ops	= &atp86x_port_ops,
@@ -211,8 +215,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { 
		.pio_mask	= ATA_PIO4,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= ATA_UDMA4,

	},{	/* 3 */

		.name		= "AEC6280",

	},

	{	/* 3: AEC6280 */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_aec62xx,

		.port_ops	= &atp86x_port_ops,

		.host_flags	= IDE_HFLAG_NO_ATAPI_DMA |
@@ -220,8 +225,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { 
		.pio_mask	= ATA_PIO4,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= ATA_UDMA5,

	},{	/* 4 */

		.name		= "AEC6280R",

	},

	{	/* 4: AEC6280R */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_aec62xx,

		.enablebits	= {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},

		.port_ops	= &atp86x_port_ops,
@@ -268,7 +274,8 @@ static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_devi 
		unsigned long dma_base = pci_resource_start(dev, 4);



		if (inb(dma_base + 2) & 0x10) {

			d.name = (idx == 4) ? "AEC6880R" : "AEC6880";

			printk(KERN_INFO DRV_NAME " %s: AEC6880%s card detected"

				"\n", pci_name(dev), (idx == 4) ? "R" : "");

			d.udma_mask = ATA_UDMA6;

		}

	}

drivers/ide/pci/alim15x3.c

+3 −1
Original line number Diff line number Diff line
@@ -38,6 +38,8 @@ 


#include <asm/io.h>



#define DRV_NAME "alim15x3"



/*

 * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking

 * (this is DANGEROUS and could result in data corruption).
@@ -515,7 +517,7 @@ static const struct ide_dma_ops ali_dma_ops = { 
};



static const struct ide_port_info ali15x3_chipset __devinitdata = {

	.name		= "ALI15X3",

	.name		= DRV_NAME,

	.init_chipset	= init_chipset_ali15x3,

	.init_hwif	= init_hwif_ali15x3,

	.init_dma	= init_dma_ali15x3,

drivers/ide/pci/amd74xx.c

+36 −50
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ 
#include <linux/init.h>

#include <linux/ide.h>



#define DRV_NAME "amd74xx"



enum {

	AMD_IDE_CONFIG		= 0x41,

	AMD_CABLE_DETECT	= 0x42,
@@ -204,9 +206,9 @@ static const struct ide_port_ops amd_port_ops = { 
	 IDE_HFLAG_IO_32BIT | \

	 IDE_HFLAG_UNMASK_IRQS)



#define DECLARE_AMD_DEV(name_str, swdma, udma)				\

#define DECLARE_AMD_DEV(swdma, udma)				\

	{								\

		.name		= name_str,				\

		.name		= DRV_NAME,				\

		.init_chipset	= init_chipset_amd74xx,			\

		.init_hwif	= init_hwif_amd74xx,			\

		.enablebits	= {{0x40,0x02,0x02}, {0x40,0x01,0x01}},	\
@@ -218,9 +220,9 @@ static const struct ide_port_ops amd_port_ops = { 
		.udma_mask	= udma,					\

	}



#define DECLARE_NV_DEV(name_str, udma)					\

#define DECLARE_NV_DEV(udma)					\

	{								\

		.name		= name_str,				\

		.name		= DRV_NAME,				\

		.init_chipset	= init_chipset_amd74xx,			\

		.init_hwif	= init_hwif_amd74xx,			\

		.enablebits	= {{0x50,0x02,0x02}, {0x50,0x01,0x01}},	\
@@ -233,31 +235,15 @@ static const struct ide_port_ops amd_port_ops = { 
	}



static const struct ide_port_info amd74xx_chipsets[] __devinitdata = {

	/*  0 */ DECLARE_AMD_DEV("AMD7401",	  0x00, ATA_UDMA2),

	/*  1 */ DECLARE_AMD_DEV("AMD7409", ATA_SWDMA2, ATA_UDMA4),

	/*  2 */ DECLARE_AMD_DEV("AMD7411", ATA_SWDMA2, ATA_UDMA5),

	/*  3 */ DECLARE_AMD_DEV("AMD7441", ATA_SWDMA2, ATA_UDMA5),

	/*  4 */ DECLARE_AMD_DEV("AMD8111", ATA_SWDMA2, ATA_UDMA6),



	/*  5 */ DECLARE_NV_DEV("NFORCE",		ATA_UDMA5),

	/*  6 */ DECLARE_NV_DEV("NFORCE2",		ATA_UDMA6),

	/*  7 */ DECLARE_NV_DEV("NFORCE2-U400R",	ATA_UDMA6),

	/*  8 */ DECLARE_NV_DEV("NFORCE2-U400R-SATA",	ATA_UDMA6),

	/*  9 */ DECLARE_NV_DEV("NFORCE3-150",		ATA_UDMA6),

	/* 10 */ DECLARE_NV_DEV("NFORCE3-250",		ATA_UDMA6),

	/* 11 */ DECLARE_NV_DEV("NFORCE3-250-SATA",	ATA_UDMA6),

	/* 12 */ DECLARE_NV_DEV("NFORCE3-250-SATA2",	ATA_UDMA6),

	/* 13 */ DECLARE_NV_DEV("NFORCE-CK804",		ATA_UDMA6),

	/* 14 */ DECLARE_NV_DEV("NFORCE-MCP04",		ATA_UDMA6),

	/* 15 */ DECLARE_NV_DEV("NFORCE-MCP51",		ATA_UDMA6),

	/* 16 */ DECLARE_NV_DEV("NFORCE-MCP55",		ATA_UDMA6),

	/* 17 */ DECLARE_NV_DEV("NFORCE-MCP61",		ATA_UDMA6),

	/* 18 */ DECLARE_NV_DEV("NFORCE-MCP65",		ATA_UDMA6),

	/* 19 */ DECLARE_NV_DEV("NFORCE-MCP67",		ATA_UDMA6),

	/* 20 */ DECLARE_NV_DEV("NFORCE-MCP73",		ATA_UDMA6),

	/* 21 */ DECLARE_NV_DEV("NFORCE-MCP77",		ATA_UDMA6),



	/* 22 */ DECLARE_AMD_DEV("AMD5536", ATA_SWDMA2, ATA_UDMA5),

	/* 0: AMD7401 */	DECLARE_AMD_DEV(0x00, ATA_UDMA2),

	/* 1: AMD7409 */	DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA4),

	/* 2: AMD7411/7441 */	DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5),

	/* 3: AMD8111 */	DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA6),



	/* 4: NFORCE */		DECLARE_NV_DEV(ATA_UDMA5),

	/* 5: >= NFORCE2 */	DECLARE_NV_DEV(ATA_UDMA6),



	/* 6: AMD5536 */	DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5),

};



static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
@@ -274,7 +260,7 @@ static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_ 
		if (dev->revision <= 7)

			d.swdma_mask = 0;

		d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;

	} else if (idx == 4) {

	} else if (idx == 3) {

		if (dev->subsystem_vendor == PCI_VENDOR_ID_AMD &&

		    dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE)

			d.udma_mask = ATA_UDMA5;
@@ -308,30 +294,30 @@ static const struct pci_device_id amd74xx_pci_tbl[] = { 
	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_COBRA_7401),		 0 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_VIPER_7409),		 1 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_VIPER_7411),		 2 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_OPUS_7441),		 3 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_8111_IDE),		 4 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE),	 6 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE),	 7 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_OPUS_7441),		 2 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_8111_IDE),		 3 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_IDE),	 4 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE),	 5 },

#ifdef CONFIG_BLK_DEV_IDE_SATA

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA),	 8 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA),	 5 },

#endif

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE),	 9 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE),	10 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE),	 5 },

#ifdef CONFIG_BLK_DEV_IDE_SATA

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA),	11 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2),	12 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2),	 5 },

#endif

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE),	13 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE),	14 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE),	15 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE),	16 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE),	17 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE),	18 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE),	19 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE),	20 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE),	21 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_CS5536_IDE),		22 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE),	 5 },

	{ PCI_VDEVICE(NVIDIA,	PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE),	 5 },

	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_CS5536_IDE),		 6 },

	{ 0, },

};

MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);

drivers/ide/pci/atiixp.c

+7 −4
Original line number Diff line number Diff line
@@ -11,6 +11,8 @@ 
#include <linux/ide.h>

#include <linux/init.h>



#define DRV_NAME "atiixp"



#define ATIIXP_IDE_PIO_TIMING		0x40

#define ATIIXP_IDE_MDMA_TIMING		0x44

#define ATIIXP_IDE_PIO_CONTROL		0x48
@@ -137,16 +139,17 @@ static const struct ide_port_ops atiixp_port_ops = { 
};



static const struct ide_port_info atiixp_pci_info[] __devinitdata = {

	{	/* 0 */

		.name		= "ATIIXP",

	{	/* 0: IXP200/300/400/700 */

		.name		= DRV_NAME,

		.enablebits	= {{0x48,0x01,0x00}, {0x48,0x08,0x00}},

		.port_ops	= &atiixp_port_ops,

		.host_flags	= IDE_HFLAG_LEGACY_IRQS,

		.pio_mask	= ATA_PIO4,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= ATA_UDMA5,

	},{	/* 1 */

		.name		= "SB600_PATA",

	},

	{	/* 1: IXP600 */

		.name		= DRV_NAME,

		.enablebits	= {{0x48,0x01,0x00}, {0x00,0x00,0x00}},

		.port_ops	= &atiixp_port_ops,

		.host_flags	= IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS,

drivers/ide/pci/cmd64x.c

+13 −8
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ 


#include <asm/io.h>



#define DRV_NAME "cmd64x"



#define CMD_DEBUG 0



#if CMD_DEBUG
@@ -407,8 +409,8 @@ static const struct ide_dma_ops cmd648_dma_ops = { 
};



static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {

	{	/* 0 */

		.name		= "CMD643",

	{	/* 0: CMD643 */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_cmd64x,

		.enablebits	= {{0x00,0x00,0x00}, {0x51,0x08,0x08}},

		.port_ops	= &cmd64x_port_ops,
@@ -418,8 +420,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { 
		.pio_mask	= ATA_PIO5,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= 0x00, /* no udma */

	},{	/* 1 */

		.name		= "CMD646",

	},

	{	/* 1: CMD646 */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_cmd64x,

		.enablebits	= {{0x51,0x04,0x04}, {0x51,0x08,0x08}},

		.chipset	= ide_cmd646,
@@ -429,8 +432,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { 
		.pio_mask	= ATA_PIO5,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= ATA_UDMA2,

	},{	/* 2 */

		.name		= "CMD648",

	},

	{	/* 2: CMD648 */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_cmd64x,

		.enablebits	= {{0x51,0x04,0x04}, {0x51,0x08,0x08}},

		.port_ops	= &cmd64x_port_ops,
@@ -439,8 +443,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { 
		.pio_mask	= ATA_PIO5,

		.mwdma_mask	= ATA_MWDMA2,

		.udma_mask	= ATA_UDMA4,

	},{	/* 3 */

		.name		= "CMD649",

	},

	{	/* 3: CMD649 */

		.name		= DRV_NAME,

		.init_chipset	= init_chipset_cmd64x,

		.enablebits	= {{0x51,0x04,0x04}, {0x51,0x08,0x08}},

		.port_ops	= &cmd64x_port_ops,

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