drm/i915: don't increment the FBC threshold at fbc_enable (ce65e47b) · Commits · 戴 / test

We first set the threshold value when we're allocating the CFB, and then later at {ilk,gen7}_fbc_enable() we increment it in case we're using 16bpp. While that is correct, it is dangerous: if we rework the code a little bit in a way that allows us to call intel_fbc_enable() without necessarily calling i915_gem_stolen_setup_compression() first, we might end up incrementing threshold more than once. To prevent that, increment a temporary variable instead. v2: Rebase. Signed-off-by:

Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by:

Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:

Daniel Vetter <daniel.vetter@ffwll.ch>

drivers/gpu/drm/i915/intel_fbc.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -188,14 +188,15 @@ static void ilk_fbc_enable(struct drm_crtc *crtc)
		struct drm_i915_gem_object *obj = intel_fb_obj(fb);
		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
		u32 dpfc_ctl;
		int threshold = dev_priv->fbc.threshold;

		dev_priv->fbc.enabled = true;

		dpfc_ctl = DPFC_CTL_PLANE(intel_crtc->plane);
		if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
		dev_priv->fbc.threshold++;
		threshold++;

		switch (dev_priv->fbc.threshold) {
		switch (threshold) {
		case 4:
		case 3:
		dpfc_ctl \|= DPFC_CTL_LIMIT_4X;
		@@ -259,6 +260,7 @@ static void gen7_fbc_enable(struct drm_crtc *crtc)
		struct drm_i915_gem_object *obj = intel_fb_obj(fb);
		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
		u32 dpfc_ctl;
		int threshold = dev_priv->fbc.threshold;

		dev_priv->fbc.enabled = true;

		@@ -267,9 +269,9 @@ static void gen7_fbc_enable(struct drm_crtc *crtc)
		dpfc_ctl \|= IVB_DPFC_CTL_PLANE(intel_crtc->plane);

		if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
		dev_priv->fbc.threshold++;
		threshold++;

		switch (dev_priv->fbc.threshold) {
		switch (threshold) {
		case 4:
		case 3:
		dpfc_ctl \|= DPFC_CTL_LIMIT_4X;

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