Commit ce615f5c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dmaengine-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine 

Pull dmaengine updates from Vinod Koul:
 "Core:
   - Support out of order dma completion
   - Support for repeating transaction

  New controllers:
   - Support for Actions S700 DMA engine
   - Renesas R8A774E1, r8a7742 controller binding
   - New driver for Xilinx DPDMA controller

  Other:
   - Support of out of order dma completion in idxd driver
   - W=1 warning cleanup of subsystem
   - Updates to ti-k3-dma, dw, idxd drivers"

* tag 'dmaengine-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (68 commits)
  dmaengine: dw: Don't include unneeded header to platform data header
  dmaengine: Actions: Add support for S700 DMA engine
  dmaengine: Actions: get rid of bit fields from dma descriptor
  dt-bindings: dmaengine: convert Actions Semi Owl SoCs bindings to yaml
  dmaengine: idxd: add missing invalid flags field to completion
  dmaengine: dw: Initialize max_sg_burst capability
  dmaengine: dw: Introduce max burst length hw config
  dmaengine: dw: Initialize min and max burst DMA device capability
  dmaengine: dw: Set DMA device max segment size parameter
  dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config
  dmaengine: Introduce DMA-device device_caps callback
  dmaengine: Introduce max SG burst capability
  dmaengine: Introduce min burst length capability
  dt-bindings: dma: dw: Add max burst transaction length property
  dt-bindings: dma: dw: Convert DW DMAC to DT binding
  dmaengine: ti: k3-udma: Query throughput level information from hardware
  dmaengine: ti: k3-udma: Use defines for capabilities register parsing
  dmaengine: xilinx: dpdma: Fix kerneldoc warning
  dmaengine: xilinx: dpdma: add missing kernel doc
  dmaengine: xilinx: dpdma: remove comparison of unsigned expression
  ...
parents 81e11336 00043a26

Documentation/ABI/stable/sysfs-driver-dma-idxd

+28 −28
Original line number Diff line number Diff line 
What:		sys/bus/dsa/devices/dsa<m>/version

What:		/sys/bus/dsa/devices/dsa<m>/version

Date:		Apr 15, 2020

KernelVersion:	5.8.0

Contact:	dmaengine@vger.kernel.org

Description:	The hardware version number.



What:           sys/bus/dsa/devices/dsa<m>/cdev_major

What:           /sys/bus/dsa/devices/dsa<m>/cdev_major

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:	The major number that the character device driver assigned to

		this device.



What:           sys/bus/dsa/devices/dsa<m>/errors

What:           /sys/bus/dsa/devices/dsa<m>/errors

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The error information for this device.



What:           sys/bus/dsa/devices/dsa<m>/max_batch_size

What:           /sys/bus/dsa/devices/dsa<m>/max_batch_size

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The largest number of work descriptors in a batch.



What:           sys/bus/dsa/devices/dsa<m>/max_work_queues_size

What:           /sys/bus/dsa/devices/dsa<m>/max_work_queues_size

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The maximum work queue size supported by this device.



What:           sys/bus/dsa/devices/dsa<m>/max_engines

What:           /sys/bus/dsa/devices/dsa<m>/max_engines

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The maximum number of engines supported by this device.



What:           sys/bus/dsa/devices/dsa<m>/max_groups

What:           /sys/bus/dsa/devices/dsa<m>/max_groups

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The maximum number of groups can be created under this device.



What:           sys/bus/dsa/devices/dsa<m>/max_tokens

What:           /sys/bus/dsa/devices/dsa<m>/max_tokens

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org
@@ -50,7 +50,7 @@ Description: The total number of bandwidth tokens supported by this device. 
		implementation, and these resources are allocated by engines to

		support operations.



What:           sys/bus/dsa/devices/dsa<m>/max_transfer_size

What:           /sys/bus/dsa/devices/dsa<m>/max_transfer_size

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org
@@ -58,57 +58,57 @@ Description: The number of bytes to be read from the source address to 
		perform the operation. The maximum transfer size is dependent on

		the workqueue the descriptor was submitted to.



What:           sys/bus/dsa/devices/dsa<m>/max_work_queues

What:           /sys/bus/dsa/devices/dsa<m>/max_work_queues

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The maximum work queue number that this device supports.



What:           sys/bus/dsa/devices/dsa<m>/numa_node

What:           /sys/bus/dsa/devices/dsa<m>/numa_node

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The numa node number for this device.



What:           sys/bus/dsa/devices/dsa<m>/op_cap

What:           /sys/bus/dsa/devices/dsa<m>/op_cap

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The operation capability bit mask specify the operation types

		supported by the this device.



What:           sys/bus/dsa/devices/dsa<m>/state

What:           /sys/bus/dsa/devices/dsa<m>/state

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The state information of this device. It can be either enabled

		or disabled.



What:           sys/bus/dsa/devices/dsa<m>/group<m>.<n>

What:           /sys/bus/dsa/devices/dsa<m>/group<m>.<n>

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The assigned group under this device.



What:           sys/bus/dsa/devices/dsa<m>/engine<m>.<n>

What:           /sys/bus/dsa/devices/dsa<m>/engine<m>.<n>

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The assigned engine under this device.



What:           sys/bus/dsa/devices/dsa<m>/wq<m>.<n>

What:           /sys/bus/dsa/devices/dsa<m>/wq<m>.<n>

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The assigned work queue under this device.



What:           sys/bus/dsa/devices/dsa<m>/configurable

What:           /sys/bus/dsa/devices/dsa<m>/configurable

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    To indicate if this device is configurable or not.



What:           sys/bus/dsa/devices/dsa<m>/token_limit

What:           /sys/bus/dsa/devices/dsa<m>/token_limit

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org
@@ -116,19 +116,19 @@ Description: The maximum number of bandwidth tokens that may be in use at 
		one time by operations that access low bandwidth memory in the

		device.



What:           sys/bus/dsa/devices/wq<m>.<n>/group_id

What:           /sys/bus/dsa/devices/wq<m>.<n>/group_id

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The group id that this work queue belongs to.



What:           sys/bus/dsa/devices/wq<m>.<n>/size

What:           /sys/bus/dsa/devices/wq<m>.<n>/size

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The work queue size for this work queue.



What:           sys/bus/dsa/devices/wq<m>.<n>/type

What:           /sys/bus/dsa/devices/wq<m>.<n>/type

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org
@@ -136,20 +136,20 @@ Description: The type of this work queue, it can be "kernel" type for work 
		queue usages in the kernel space or "user" type for work queue

		usages by applications in user space.



What:           sys/bus/dsa/devices/wq<m>.<n>/cdev_minor

What:           /sys/bus/dsa/devices/wq<m>.<n>/cdev_minor

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The minor number assigned to this work queue by the character

		device driver.



What:           sys/bus/dsa/devices/wq<m>.<n>/mode

What:           /sys/bus/dsa/devices/wq<m>.<n>/mode

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The work queue mode type for this work queue.



What:           sys/bus/dsa/devices/wq<m>.<n>/priority

What:           /sys/bus/dsa/devices/wq<m>.<n>/priority

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org
@@ -157,20 +157,20 @@ Description: The priority value of this work queue, it is a vlue relative to 
		other work queue in the same group to control quality of service

		for dispatching work from multiple workqueues in the same group.



What:           sys/bus/dsa/devices/wq<m>.<n>/state

What:           /sys/bus/dsa/devices/wq<m>.<n>/state

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The current state of the work queue.



What:           sys/bus/dsa/devices/wq<m>.<n>/threshold

What:           /sys/bus/dsa/devices/wq<m>.<n>/threshold

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Description:    The number of entries in this work queue that may be filled

		via a limited portal.



What:           sys/bus/dsa/devices/engine<m>.<n>/group_id

What:           /sys/bus/dsa/devices/engine<m>.<n>/group_id

Date:           Oct 25, 2019

KernelVersion:  5.6.0

Contact:        dmaengine@vger.kernel.org

Documentation/devicetree/bindings/dma/arm-pl330.txt

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ Optional properties: 
  - dma-channels: contains the total number of DMA channels supported by the DMAC

  - dma-requests: contains the total number of DMA requests supported by the DMAC

  - arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP

  - arm,pl330-periph-burst: quirk for performing burst transfer only

  - resets: contains an entry for each entry in reset-names.

	    See ../reset/reset.txt for details.

  - reset-names: must contain at least "dma", and optional is "dma-ocp".

Documentation/devicetree/bindings/dma/owl-dma.txt

deleted100644 → 0
+0 −47
Original line number Diff line number Diff line 
* Actions Semi Owl SoCs DMA controller



This binding follows the generic DMA bindings defined in dma.txt.



Required properties:

- compatible: Should be "actions,s900-dma".

- reg: Should contain DMA registers location and length.

- interrupts: Should contain 4 interrupts shared by all channel.

- #dma-cells: Must be <1>. Used to represent the number of integer

              cells in the dmas property of client device.

- dma-channels: Physical channels supported.

- dma-requests: Number of DMA request signals supported by the controller.

                Refer to Documentation/devicetree/bindings/dma/dma.txt

- clocks: Phandle and Specifier of the clock feeding the DMA controller.



Example:



Controller:

                dma: dma-controller@e0260000 {

                        compatible = "actions,s900-dma";

                        reg = <0x0 0xe0260000 0x0 0x1000>;

                        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,

                                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,

                                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,

                                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;

                        #dma-cells = <1>;

                        dma-channels = <12>;

                        dma-requests = <46>;

                        clocks = <&clock CLK_DMAC>;

                };



Client:



DMA clients connected to the Actions Semi Owl SoCs DMA controller must

use the format described in the dma.txt file, using a two-cell specifier

for each channel.



The two cells in order are:

1. A phandle pointing to the DMA controller.

2. The channel id.



uart5: serial@e012a000 {

        ...

        dma-names = "tx", "rx";

        dmas = <&dma 26>, <&dma 27>;

        ...

};

Documentation/devicetree/bindings/dma/owl-dma.yaml

0 → 100644
+79 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/owl-dma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Actions Semi Owl SoCs DMA controller



description: |

  The OWL DMA is a general-purpose direct memory access controller capable of

  supporting 10 and 12 independent DMA channels for S700 and S900 SoCs

  respectively.



maintainers:

  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



allOf:

  - $ref: "dma-controller.yaml#"



properties:

  compatible:

    enum:

      - actions,s900-dma

      - actions,s700-dma



  reg:

    maxItems: 1



  interrupts:

    description:

      controller supports 4 interrupts, which are freely assignable to the

      DMA channels.

    maxItems: 4



  "#dma-cells":

    const: 1



  dma-channels:

    maximum: 12



  dma-requests:

    maximum: 46



  clocks:

    maxItems: 1

    description:

      Phandle and Specifier of the clock feeding the DMA controller.



  power-domains:

    maxItems: 1



required:

  - compatible

  - reg

  - interrupts

  - "#dma-cells"

  - dma-channels

  - dma-requests

  - clocks



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    dma: dma-controller@e0260000 {

        compatible = "actions,s900-dma";

        reg = <0xe0260000 0x1000>;

        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;

        #dma-cells = <1>;

        dma-channels = <12>;

        dma-requests = <46>;

        clocks = <&clock 22>;

    };



...

Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml

+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ properties: 
          - renesas,dmac-r8a774a1 # RZ/G2M

          - renesas,dmac-r8a774b1 # RZ/G2N

          - renesas,dmac-r8a774c0 # RZ/G2E

          - renesas,dmac-r8a774e1 # RZ/G2H

          - renesas,dmac-r8a7790  # R-Car H2

          - renesas,dmac-r8a7791  # R-Car M2-W

          - renesas,dmac-r8a7792  # R-Car V2H

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