Commit ce43b2e3 authored by Ofer Heifetz's avatar Ofer Heifetz Committed by Herbert Xu
Browse files

crypto: inside-secure - increase minimum transfer size 



The token size was increased for AEAD support. Occasional authentication
fails arise since the result descriptor overflows. This is because the
token size and the engine minimal thresholds must be in sync.

Signed-off-by: default avatarOfer Heifetz <oferh@marvell.com>
Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent ce397d21

drivers/crypto/inside-secure/safexcel.c

+4 −4
Original line number Diff line number Diff line
@@ -296,8 +296,8 @@ static int safexcel_hw_init(struct safexcel_crypto_priv *priv) 


	/* DMA transfer size to use */

	val = EIP197_HIA_DFE_CFG_DIS_DEBUG;

	val |= EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(5) | EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(9);

	val |= EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE(5) | EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE(7);

	val |= EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(6) | EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(9);

	val |= EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE(6) | EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE(7);

	val |= EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(RD_CACHE_3BITS);

	val |= EIP197_HIA_DxE_CFG_CTRL_CACHE_CTRL(RD_CACHE_3BITS);

	writel(val, EIP197_HIA_DFE(priv) + EIP197_HIA_DFE_CFG);
@@ -306,9 +306,9 @@ static int safexcel_hw_init(struct safexcel_crypto_priv *priv) 
	writel(0, EIP197_HIA_DFE_THR(priv) + EIP197_HIA_DFE_THR_CTRL);



	/* Configure the procesing engine thresholds */

	writel(EIP197_PE_IN_xBUF_THRES_MIN(5) | EIP197_PE_IN_xBUF_THRES_MAX(9),

	writel(EIP197_PE_IN_xBUF_THRES_MIN(6) | EIP197_PE_IN_xBUF_THRES_MAX(9),

	       EIP197_PE(priv) + EIP197_PE_IN_DBUF_THRES);

	writel(EIP197_PE_IN_xBUF_THRES_MIN(5) | EIP197_PE_IN_xBUF_THRES_MAX(7),

	writel(EIP197_PE_IN_xBUF_THRES_MIN(6) | EIP197_PE_IN_xBUF_THRES_MAX(7),

	       EIP197_PE(priv) + EIP197_PE_IN_TBUF_THRES);



	if (priv->version == EIP197) {

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