Commit cdc6aba6 authored by Kamal Dasu's avatar Kamal Dasu Committed by Miquel Raynal
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dt: bindings: brcmnand: Add support for flash-edu

parent 0d7d6c81
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+5 −5
Original line number Diff line number Diff line
@@ -35,11 +35,11 @@ Required properties:
                     (optional) NAND flash cache range (if at non-standard offset)
- reg-names        : a list of the names corresponding to the previous register
                     ranges. Should contain "nand" and (optionally)
                     "flash-dma" and/or "nand-cache".
- interrupts       : The NAND CTLRDY interrupt and (if Flash DMA is available)
                     FLASH_DMA_DONE
- interrupt-names  : May be "nand_ctlrdy" or "flash_dma_done", if broken out as
                     individual interrupts.
                     "flash-dma" or "flash-edu" and/or "nand-cache".
- interrupts       : The NAND CTLRDY interrupt, (if Flash DMA is available)
                     FLASH_DMA_DONE and if EDU is avaialble and used FLASH_EDU_DONE
- interrupt-names  : May be "nand_ctlrdy" or "flash_dma_done" or "flash_edu_done",
                     if broken out as individual interrupts.
                     May be "nand", if the SoC has the individual NAND
                     interrupts multiplexed behind another custom piece of
                     hardware