Commit cdba61da authored by wentalou's avatar wentalou Committed by Alex Deucher
Browse files

drm/amdgpu: sriov restrict max_pfn below AMDGPU_GMC_HOLE 



sriov need to restrict max_pfn below AMDGPU_GMC_HOLE.
access the hole results in a range fault interrupt IIRC.

Signed-off-by: default avatarWentao Lou <Wentao.Lou@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 06ea4c34

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c

+1 −2
Original line number Diff line number Diff line
@@ -26,8 +26,7 @@ 


uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)

{

	uint64_t addr = min(adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT,

				AMDGPU_GMC_HOLE_START);

	uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;



	addr -= AMDGPU_VA_RESERVED_SIZE;

	addr = amdgpu_gmc_sign_extend(addr);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+5 −1
Original line number Diff line number Diff line
@@ -965,6 +965,10 @@ static int gmc_v9_0_sw_init(void *handle) 
		 * vm size is 256TB (48bit), maximum size of Vega10,

		 * block size 512 (9bit)

		 */

		/* sriov restrict max_pfn below AMDGPU_GMC_HOLE */

		if (amdgpu_sriov_vf(adev))

			amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 47);

		else

			amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);

		break;

	default:

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