Commit cdafdc29 authored by Heiner Kallweit's avatar Heiner Kallweit Committed by David S. Miller
Browse files

r8169: sync support for RTL8401 with vendor driver 



So far RTL8401 was treated like a RTL8101e, means we relied on the BIOS
to configure MAC and PHY properly. Make RTL8401 a separate chip version
and copy MAC / PHY config from r8101 vendor driver.

Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 93c09ca6

drivers/net/ethernet/realtek/r8169.h

+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ enum mac_version { 
	RTL_GIGA_MAC_VER_11,

	RTL_GIGA_MAC_VER_12,

	RTL_GIGA_MAC_VER_13,

	RTL_GIGA_MAC_VER_14,

	RTL_GIGA_MAC_VER_16,

	RTL_GIGA_MAC_VER_17,

	RTL_GIGA_MAC_VER_18,

drivers/net/ethernet/realtek/r8169_main.c

+16 −2
Original line number Diff line number Diff line
@@ -106,6 +106,7 @@ static const struct { 
	[RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b"			},

	[RTL_GIGA_MAC_VER_12] = {"RTL8168b/8111b"			},

	[RTL_GIGA_MAC_VER_13] = {"RTL8101e/RTL8100e"			},

	[RTL_GIGA_MAC_VER_14] = {"RTL8401"				},

	[RTL_GIGA_MAC_VER_16] = {"RTL8101e"				},

	[RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b"			},

	[RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp"			},
@@ -1999,8 +2000,7 @@ static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii) 
		{ 0x7cf, 0x348,	RTL_GIGA_MAC_VER_07 },

		{ 0x7cf, 0x248,	RTL_GIGA_MAC_VER_07 },

		{ 0x7cf, 0x340,	RTL_GIGA_MAC_VER_13 },

		/* RTL8401, reportedly works if treated as RTL8101e */

		{ 0x7cf, 0x240,	RTL_GIGA_MAC_VER_13 },

		{ 0x7cf, 0x240,	RTL_GIGA_MAC_VER_14 },

		{ 0x7cf, 0x343,	RTL_GIGA_MAC_VER_10 },

		{ 0x7cf, 0x342,	RTL_GIGA_MAC_VER_16 },

		{ 0x7c8, 0x348,	RTL_GIGA_MAC_VER_09 },
@@ -3401,6 +3401,19 @@ static void rtl_hw_start_8102e_3(struct rtl8169_private *tp) 
	rtl_ephy_write(tp, 0x03, 0xc2f9);

}



static void rtl_hw_start_8401(struct rtl8169_private *tp)

{

	static const struct ephy_info e_info_8401[] = {

		{ 0x01,	0xffff, 0x6fe5 },

		{ 0x03,	0xffff, 0x0599 },

		{ 0x06,	0xffff, 0xaf25 },

		{ 0x07,	0xffff, 0x8e68 },

	};



	rtl_ephy_init(tp, e_info_8401);

	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);

}



static void rtl_hw_start_8105e_1(struct rtl8169_private *tp)

{

	static const struct ephy_info e_info_8105e_1[] = {
@@ -3614,6 +3627,7 @@ static void rtl_hw_config(struct rtl8169_private *tp) 
		[RTL_GIGA_MAC_VER_11] = rtl_hw_start_8168b,

		[RTL_GIGA_MAC_VER_12] = rtl_hw_start_8168b,

		[RTL_GIGA_MAC_VER_13] = NULL,

		[RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,

		[RTL_GIGA_MAC_VER_16] = NULL,

		[RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,

		[RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,

drivers/net/ethernet/realtek/r8169_phy_config.c

+8 −0
Original line number Diff line number Diff line
@@ -1091,6 +1091,13 @@ static void rtl8102e_hw_phy_config(struct rtl8169_private *tp, 
	rtl_writephy_batch(phydev, phy_reg_init);

}



static void rtl8401_hw_phy_config(struct rtl8169_private *tp,

				  struct phy_device *phydev)

{

	phy_set_bits(phydev, 0x11, BIT(12));

	phy_modify_paged(phydev, 0x0002, 0x0f, 0x0000, 0x0003);

}



static void rtl8105e_hw_phy_config(struct rtl8169_private *tp,

				   struct phy_device *phydev)

{
@@ -1261,6 +1268,7 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev, 
		[RTL_GIGA_MAC_VER_11] = rtl8168bb_hw_phy_config,

		[RTL_GIGA_MAC_VER_12] = rtl8168bef_hw_phy_config,

		[RTL_GIGA_MAC_VER_13] = NULL,

		[RTL_GIGA_MAC_VER_14] = rtl8401_hw_phy_config,

		[RTL_GIGA_MAC_VER_16] = NULL,

		[RTL_GIGA_MAC_VER_17] = rtl8168bef_hw_phy_config,

		[RTL_GIGA_MAC_VER_18] = rtl8168cp_1_hw_phy_config,

CRA Git | Maintained and supported by SUSTech CRA and CCSE