Commit cd8281ac authored by Patrick Havelange's avatar Patrick Havelange Committed by Shawn Guo
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ARM: dts: ls1021a: Add memory controller 



The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.

Signed-off-by: default avatarPatrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 02f95c35

arch/arm/boot/dts/ls1021a.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -125,6 +125,13 @@ 
		interrupt-parent = <&gic>;

		ranges;



		ddr: memory-controller@1080000 {

			compatible = "fsl,qoriq-memory-controller";

			reg = <0x0 0x1080000 0x0 0x1000>;

			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;

			big-endian;

		};



		gic: interrupt-controller@1400000 {

			compatible = "arm,gic-400", "arm,cortex-a7-gic";

			#interrupt-cells = <3>;

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