Commit cd7d3a1b authored by Sean Paul's avatar Sean Paul
Browse files

Merge drm/drm-next into drm-misc-next



Picking up v5.0 + missed misc-fixes from last release

Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
parents 6b5c029d 4b057e73
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+9 −11
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@@ -842,10 +842,9 @@ D: ax25-utils maintainer.

N: Helge Deller
E: deller@gmx.de
E: hdeller@redhat.de
D: PA-RISC Linux hacker, LASI-, ASP-, WAX-, LCD/LED-driver
S: Schimmelsrain 1
S: D-69231 Rauenberg
W: http://www.parisc-linux.org/
D: PA-RISC Linux architecture maintainer
D: LASI-, ASP-, WAX-, LCD/LED-driver
S: Germany

N: Jean Delvare
@@ -1361,7 +1360,7 @@ S: Stellenbosch, Western Cape
S: South Africa

N: Grant Grundler
E: grundler@parisc-linux.org
E: grantgrundler@gmail.com
W: http://obmouse.sourceforge.net/
W: http://www.parisc-linux.org/
D: obmouse - rewrote Olivier Florent's Omnibook 600 "pop-up" mouse driver
@@ -2492,7 +2491,7 @@ S: Syracuse, New York 13206
S: USA

N: Kyle McMartin
E: kyle@parisc-linux.org
E: kyle@mcmartin.ca
D: Linux/PARISC hacker
D: AD1889 sound driver
S: Ottawa, Canada
@@ -3780,14 +3779,13 @@ S: 21513 Conradia Ct
S: Cupertino, CA 95014
S: USA

N: Thibaut Varene
E: T-Bone@parisc-linux.org
W: http://www.parisc-linux.org/~varenet/
P: 1024D/B7D2F063 E67C 0D43 A75E 12A5 BB1C  FA2F 1E32 C3DA B7D2 F063
N: Thibaut Varène
E: hacks+kernel@slashdirt.org
W: http://hacks.slashdirt.org/
D: PA-RISC port minion, PDC and GSCPS2 drivers, debuglocks and other bits
D: Some ARM at91rm9200 bits, S1D13XXX FB driver, random patches here and there
D: AD1889 sound driver
S: Paris, France
S: France

N: Heikki Vatiainen
E: hessu@cs.tut.fi
+16 −16
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.. _readme:

Linux kernel release 4.x <http://kernel.org/>
Linux kernel release 5.x <http://kernel.org/>
=============================================

These are the release notes for Linux version 4.  Read them carefully,
These are the release notes for Linux version 5.  Read them carefully,
as they tell you what this is all about, explain how to install the
kernel, and what to do if something goes wrong.

@@ -63,7 +63,7 @@ Installing the kernel source
   directory where you have permissions (e.g. your home directory) and
   unpack it::

     xz -cd linux-4.X.tar.xz | tar xvf -
     xz -cd linux-5.x.tar.xz | tar xvf -

   Replace "X" with the version number of the latest kernel.

@@ -72,26 +72,26 @@ Installing the kernel source
   files.  They should match the library, and not get messed up by
   whatever the kernel-du-jour happens to be.

 - You can also upgrade between 4.x releases by patching.  Patches are
 - You can also upgrade between 5.x releases by patching.  Patches are
   distributed in the xz format.  To install by patching, get all the
   newer patch files, enter the top level directory of the kernel source
   (linux-4.X) and execute::
   (linux-5.x) and execute::

     xz -cd ../patch-4.x.xz | patch -p1
     xz -cd ../patch-5.x.xz | patch -p1

   Replace "x" for all versions bigger than the version "X" of your current
   Replace "x" for all versions bigger than the version "x" of your current
   source tree, **in_order**, and you should be ok.  You may want to remove
   the backup files (some-file-name~ or some-file-name.orig), and make sure
   that there are no failed patches (some-file-name# or some-file-name.rej).
   If there are, either you or I have made a mistake.

   Unlike patches for the 4.x kernels, patches for the 4.x.y kernels
   Unlike patches for the 5.x kernels, patches for the 5.x.y kernels
   (also known as the -stable kernels) are not incremental but instead apply
   directly to the base 4.x kernel.  For example, if your base kernel is 4.0
   and you want to apply the 4.0.3 patch, you must not first apply the 4.0.1
   and 4.0.2 patches. Similarly, if you are running kernel version 4.0.2 and
   want to jump to 4.0.3, you must first reverse the 4.0.2 patch (that is,
   patch -R) **before** applying the 4.0.3 patch. You can read more on this in
   directly to the base 5.x kernel.  For example, if your base kernel is 5.0
   and you want to apply the 5.0.3 patch, you must not first apply the 5.0.1
   and 5.0.2 patches. Similarly, if you are running kernel version 5.0.2 and
   want to jump to 5.0.3, you must first reverse the 5.0.2 patch (that is,
   patch -R) **before** applying the 5.0.3 patch. You can read more on this in
   :ref:`Documentation/process/applying-patches.rst <applying_patches>`.

   Alternatively, the script patch-kernel can be used to automate this
@@ -114,7 +114,7 @@ Installing the kernel source
Software requirements
---------------------

   Compiling and running the 4.x kernels requires up-to-date
   Compiling and running the 5.x kernels requires up-to-date
   versions of various software packages.  Consult
   :ref:`Documentation/process/changes.rst <changes>` for the minimum version numbers
   required and how to get updates for these packages.  Beware that using
@@ -132,12 +132,12 @@ Build directory for the kernel
   place for the output files (including .config).
   Example::

     kernel source code: /usr/src/linux-4.X
     kernel source code: /usr/src/linux-5.x
     build directory:    /home/name/build/kernel

   To configure and build the kernel, use::

     cd /usr/src/linux-4.X
     cd /usr/src/linux-5.x
     make O=/home/name/build/kernel menuconfig
     make O=/home/name/build/kernel
     sudo make O=/home/name/build/kernel modules_install install
+59 −0
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Qualcomm adreno/snapdragon GMU (Graphics management unit)

The GMU is a programmable power controller for the GPU. the CPU controls the
GMU which in turn handles power controls for the GPU.

Required properties:
- compatible: "qcom,adreno-gmu-XYZ.W", "qcom,adreno-gmu"
    for example: "qcom,adreno-gmu-630.2", "qcom,adreno-gmu"
  Note that you need to list the less specific "qcom,adreno-gmu"
  for generic matches and the more specific identifier to identify
  the specific device.
- reg: Physical base address and length of the GMU registers.
- reg-names: Matching names for the register regions
  * "gmu"
  * "gmu_pdc"
  * "gmu_pdc_seg"
- interrupts: The interrupt signals from the GMU.
- interrupt-names: Matching names for the interrupts
  * "hfi"
  * "gmu"
- clocks: phandles to the device clocks
- clock-names: Matching names for the clocks
   * "gmu"
   * "cxo"
   * "axi"
   * "mnoc"
- power-domains: should be <&clock_gpucc GPU_CX_GDSC>
- iommus: phandle to the adreno iommu
- operating-points-v2: phandle to the OPP operating points

Example:

/ {
	...

	gmu: gmu@506a000 {
		compatible="qcom,adreno-gmu-630.2", "qcom,adreno-gmu";

		reg = <0x506a000 0x30000>,
			<0xb280000 0x10000>,
			<0xb480000 0x10000>;
		reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";

		interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "hfi", "gmu";

		clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
			<&gpucc GPU_CC_CXO_CLK>,
			<&gcc GCC_DDRSS_GPU_AXI_CLK>,
			<&gcc GCC_GPU_MEMNOC_GFX_CLK>;
		clock-names = "gmu", "cxo", "axi", "memnoc";

		power-domains = <&gpucc GPU_CX_GDSC>;
		iommus = <&adreno_smmu 5>;

		operating-points-v2 = <&gmu_opp_table>;
	};
};
+39 −3
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@@ -10,14 +10,23 @@ Required properties:
  If "amd,imageon" is used, there should be no top level msm device.
- reg: Physical base address and length of the controller's registers.
- interrupts: The interrupt signal from the gpu.
- clocks: device clocks
- clocks: device clocks (if applicable)
  See ../clocks/clock-bindings.txt for details.
- clock-names: the following clocks are required:
- clock-names: the following clocks are required by a3xx, a4xx and a5xx
  cores:
  * "core"
  * "iface"
  * "mem_iface"
  For GMU attached devices the GPU clocks are not used and are not required. The
  following devices should not list clocks:
   - qcom,adreno-630.2
- iommus: optional phandle to an adreno iommu instance
- operating-points-v2: optional phandle to the OPP operating points
- qcom,gmu: For GMU attached devices a phandle to the GMU device that will
  control the power for the GPU. Applicable targets:
    - qcom,adreno-630.2

Example:
Example 3xx/4xx/a5xx:

/ {
	...
@@ -37,3 +46,30 @@ Example:
		    <&mmcc MMSS_IMEM_AHB_CLK>;
	};
};

Example a6xx (with GMU):

/ {
	...

	gpu@5000000 {
		compatible = "qcom,adreno-630.2", "qcom,adreno";
		#stream-id-cells = <16>;

		reg = <0x5000000 0x40000>, <0x509e000 0x10>;
		reg-names = "kgsl_3d0_reg_memory", "cx_mem";

		/*
		 * Look ma, no clocks! The GPU clocks and power are
		 * controlled entirely by the GMU
		 */

		interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;

		iommus = <&adreno_smmu 0>;

		operating-points-v2 = <&gpu_opp_table>;

		qcom,gmu = <&gmu>;
	};
};
+3 −7
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@@ -533,16 +533,12 @@ Bridge VLAN filtering
  function that the driver has to call for each VLAN the given port is a member
  of. A switchdev object is used to carry the VID and bridge flags.

- port_fdb_prepare: bridge layer function invoked when the bridge prepares the
  installation of a Forwarding Database entry. If the operation is not
  supported, this function should return -EOPNOTSUPP to inform the bridge code
  to fallback to a software implementation. No hardware setup must be done in
  this function. See port_fdb_add for this and details.

- port_fdb_add: bridge layer function invoked when the bridge wants to install a
  Forwarding Database entry, the switch hardware should be programmed with the
  specified address in the specified VLAN Id in the forwarding database
  associated with this VLAN ID
  associated with this VLAN ID. If the operation is not supported, this
  function should return -EOPNOTSUPP to inform the bridge code to fallback to
  a software implementation.

Note: VLAN ID 0 corresponds to the port private database, which, in the context
of DSA, would be the its port-based VLAN, used by the associated bridge device.
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